GDBserver
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00001 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB. 00002 Copyright (C) 1995-2013 Free Software Foundation, Inc. 00003 00004 This file is part of GDB. 00005 00006 This program is free software; you can redistribute it and/or modify 00007 it under the terms of the GNU General Public License as published by 00008 the Free Software Foundation; either version 3 of the License, or 00009 (at your option) any later version. 00010 00011 This program is distributed in the hope that it will be useful, 00012 but WITHOUT ANY WARRANTY; without even the implied warranty of 00013 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00014 GNU General Public License for more details. 00015 00016 You should have received a copy of the GNU General Public License 00017 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 00018 00019 #include "server.h" 00020 #include "linux-low.h" 00021 00022 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h. 00023 On Bionic elf.h and linux/elf.h have conflicting definitions. */ 00024 #ifndef ELFMAG0 00025 #include <elf.h> 00026 #endif 00027 #include <sys/ptrace.h> 00028 #include <signal.h> 00029 00030 /* Defined in auto-generated files. */ 00031 void init_registers_arm (void); 00032 extern const struct target_desc *tdesc_arm; 00033 00034 void init_registers_arm_with_iwmmxt (void); 00035 extern const struct target_desc *tdesc_arm_with_iwmmxt; 00036 00037 void init_registers_arm_with_vfpv2 (void); 00038 extern const struct target_desc *tdesc_arm_with_vfpv2; 00039 00040 void init_registers_arm_with_vfpv3 (void); 00041 extern const struct target_desc *tdesc_arm_with_vfpv3; 00042 00043 void init_registers_arm_with_neon (void); 00044 extern const struct target_desc *tdesc_arm_with_neon; 00045 00046 #ifndef PTRACE_GET_THREAD_AREA 00047 #define PTRACE_GET_THREAD_AREA 22 00048 #endif 00049 00050 #ifndef PTRACE_GETWMMXREGS 00051 # define PTRACE_GETWMMXREGS 18 00052 # define PTRACE_SETWMMXREGS 19 00053 #endif 00054 00055 #ifndef PTRACE_GETVFPREGS 00056 # define PTRACE_GETVFPREGS 27 00057 # define PTRACE_SETVFPREGS 28 00058 #endif 00059 00060 #ifndef PTRACE_GETHBPREGS 00061 #define PTRACE_GETHBPREGS 29 00062 #define PTRACE_SETHBPREGS 30 00063 #endif 00064 00065 /* Information describing the hardware breakpoint capabilities. */ 00066 static struct 00067 { 00068 unsigned char arch; 00069 unsigned char max_wp_length; 00070 unsigned char wp_count; 00071 unsigned char bp_count; 00072 } arm_linux_hwbp_cap; 00073 00074 /* Enum describing the different types of ARM hardware break-/watch-points. */ 00075 typedef enum 00076 { 00077 arm_hwbp_break = 0, 00078 arm_hwbp_load = 1, 00079 arm_hwbp_store = 2, 00080 arm_hwbp_access = 3 00081 } arm_hwbp_type; 00082 00083 /* Type describing an ARM Hardware Breakpoint Control register value. */ 00084 typedef unsigned int arm_hwbp_control_t; 00085 00086 /* Structure used to keep track of hardware break-/watch-points. */ 00087 struct arm_linux_hw_breakpoint 00088 { 00089 /* Address to break on, or being watched. */ 00090 unsigned int address; 00091 /* Control register for break-/watch- point. */ 00092 arm_hwbp_control_t control; 00093 }; 00094 00095 /* Since we cannot dynamically allocate subfields of arch_process_info, 00096 assume a maximum number of supported break-/watchpoints. */ 00097 #define MAX_BPTS 32 00098 #define MAX_WPTS 32 00099 00100 /* Per-process arch-specific data we want to keep. */ 00101 struct arch_process_info 00102 { 00103 /* Hardware breakpoints for this process. */ 00104 struct arm_linux_hw_breakpoint bpts[MAX_BPTS]; 00105 /* Hardware watchpoints for this process. */ 00106 struct arm_linux_hw_breakpoint wpts[MAX_WPTS]; 00107 }; 00108 00109 /* Per-thread arch-specific data we want to keep. */ 00110 struct arch_lwp_info 00111 { 00112 /* Non-zero if our copy differs from what's recorded in the thread. */ 00113 char bpts_changed[MAX_BPTS]; 00114 char wpts_changed[MAX_WPTS]; 00115 /* Cached stopped data address. */ 00116 CORE_ADDR stopped_data_address; 00117 }; 00118 00119 static unsigned long arm_hwcap; 00120 00121 /* These are in <asm/elf.h> in current kernels. */ 00122 #define HWCAP_VFP 64 00123 #define HWCAP_IWMMXT 512 00124 #define HWCAP_NEON 4096 00125 #define HWCAP_VFPv3 8192 00126 #define HWCAP_VFPv3D16 16384 00127 00128 #ifdef HAVE_SYS_REG_H 00129 #include <sys/reg.h> 00130 #endif 00131 00132 #define arm_num_regs 26 00133 00134 static int arm_regmap[] = { 00135 0, 4, 8, 12, 16, 20, 24, 28, 00136 32, 36, 40, 44, 48, 52, 56, 60, 00137 -1, -1, -1, -1, -1, -1, -1, -1, -1, 00138 64 00139 }; 00140 00141 static int 00142 arm_cannot_store_register (int regno) 00143 { 00144 return (regno >= arm_num_regs); 00145 } 00146 00147 static int 00148 arm_cannot_fetch_register (int regno) 00149 { 00150 return (regno >= arm_num_regs); 00151 } 00152 00153 static void 00154 arm_fill_gregset (struct regcache *regcache, void *buf) 00155 { 00156 int i; 00157 00158 for (i = 0; i < arm_num_regs; i++) 00159 if (arm_regmap[i] != -1) 00160 collect_register (regcache, i, ((char *) buf) + arm_regmap[i]); 00161 } 00162 00163 static void 00164 arm_store_gregset (struct regcache *regcache, const void *buf) 00165 { 00166 int i; 00167 char zerobuf[8]; 00168 00169 memset (zerobuf, 0, 8); 00170 for (i = 0; i < arm_num_regs; i++) 00171 if (arm_regmap[i] != -1) 00172 supply_register (regcache, i, ((char *) buf) + arm_regmap[i]); 00173 else 00174 supply_register (regcache, i, zerobuf); 00175 } 00176 00177 static void 00178 arm_fill_wmmxregset (struct regcache *regcache, void *buf) 00179 { 00180 int i; 00181 00182 if (!(arm_hwcap & HWCAP_IWMMXT)) 00183 return; 00184 00185 for (i = 0; i < 16; i++) 00186 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8); 00187 00188 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */ 00189 for (i = 0; i < 6; i++) 00190 collect_register (regcache, arm_num_regs + i + 16, 00191 (char *) buf + 16 * 8 + i * 4); 00192 } 00193 00194 static void 00195 arm_store_wmmxregset (struct regcache *regcache, const void *buf) 00196 { 00197 int i; 00198 00199 if (!(arm_hwcap & HWCAP_IWMMXT)) 00200 return; 00201 00202 for (i = 0; i < 16; i++) 00203 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8); 00204 00205 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */ 00206 for (i = 0; i < 6; i++) 00207 supply_register (regcache, arm_num_regs + i + 16, 00208 (char *) buf + 16 * 8 + i * 4); 00209 } 00210 00211 static void 00212 arm_fill_vfpregset (struct regcache *regcache, void *buf) 00213 { 00214 int i, num, base; 00215 00216 if (!(arm_hwcap & HWCAP_VFP)) 00217 return; 00218 00219 if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) 00220 num = 32; 00221 else 00222 num = 16; 00223 00224 base = find_regno (regcache->tdesc, "d0"); 00225 for (i = 0; i < num; i++) 00226 collect_register (regcache, base + i, (char *) buf + i * 8); 00227 00228 collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8); 00229 } 00230 00231 static void 00232 arm_store_vfpregset (struct regcache *regcache, const void *buf) 00233 { 00234 int i, num, base; 00235 00236 if (!(arm_hwcap & HWCAP_VFP)) 00237 return; 00238 00239 if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) 00240 num = 32; 00241 else 00242 num = 16; 00243 00244 base = find_regno (regcache->tdesc, "d0"); 00245 for (i = 0; i < num; i++) 00246 supply_register (regcache, base + i, (char *) buf + i * 8); 00247 00248 supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8); 00249 } 00250 00251 extern int debug_threads; 00252 00253 static CORE_ADDR 00254 arm_get_pc (struct regcache *regcache) 00255 { 00256 unsigned long pc; 00257 collect_register_by_name (regcache, "pc", &pc); 00258 if (debug_threads) 00259 fprintf (stderr, "stop pc is %08lx\n", pc); 00260 return pc; 00261 } 00262 00263 static void 00264 arm_set_pc (struct regcache *regcache, CORE_ADDR pc) 00265 { 00266 unsigned long newpc = pc; 00267 supply_register_by_name (regcache, "pc", &newpc); 00268 } 00269 00270 /* Correct in either endianness. */ 00271 static const unsigned long arm_breakpoint = 0xef9f0001; 00272 #define arm_breakpoint_len 4 00273 static const unsigned short thumb_breakpoint = 0xde01; 00274 static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 }; 00275 00276 /* For new EABI binaries. We recognize it regardless of which ABI 00277 is used for gdbserver, so single threaded debugging should work 00278 OK, but for multi-threaded debugging we only insert the current 00279 ABI's breakpoint instruction. For now at least. */ 00280 static const unsigned long arm_eabi_breakpoint = 0xe7f001f0; 00281 00282 static int 00283 arm_breakpoint_at (CORE_ADDR where) 00284 { 00285 struct regcache *regcache = get_thread_regcache (current_inferior, 1); 00286 unsigned long cpsr; 00287 00288 collect_register_by_name (regcache, "cpsr", &cpsr); 00289 00290 if (cpsr & 0x20) 00291 { 00292 /* Thumb mode. */ 00293 unsigned short insn; 00294 00295 (*the_target->read_memory) (where, (unsigned char *) &insn, 2); 00296 if (insn == thumb_breakpoint) 00297 return 1; 00298 00299 if (insn == thumb2_breakpoint[0]) 00300 { 00301 (*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2); 00302 if (insn == thumb2_breakpoint[1]) 00303 return 1; 00304 } 00305 } 00306 else 00307 { 00308 /* ARM mode. */ 00309 unsigned long insn; 00310 00311 (*the_target->read_memory) (where, (unsigned char *) &insn, 4); 00312 if (insn == arm_breakpoint) 00313 return 1; 00314 00315 if (insn == arm_eabi_breakpoint) 00316 return 1; 00317 } 00318 00319 return 0; 00320 } 00321 00322 /* We only place breakpoints in empty marker functions, and thread locking 00323 is outside of the function. So rather than importing software single-step, 00324 we can just run until exit. */ 00325 static CORE_ADDR 00326 arm_reinsert_addr (void) 00327 { 00328 struct regcache *regcache = get_thread_regcache (current_inferior, 1); 00329 unsigned long pc; 00330 collect_register_by_name (regcache, "lr", &pc); 00331 return pc; 00332 } 00333 00334 /* Fetch the thread-local storage pointer for libthread_db. */ 00335 00336 ps_err_e 00337 ps_get_thread_area (const struct ps_prochandle *ph, 00338 lwpid_t lwpid, int idx, void **base) 00339 { 00340 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0) 00341 return PS_ERR; 00342 00343 /* IDX is the bias from the thread pointer to the beginning of the 00344 thread descriptor. It has to be subtracted due to implementation 00345 quirks in libthread_db. */ 00346 *base = (void *) ((char *)*base - idx); 00347 00348 return PS_OK; 00349 } 00350 00351 00352 /* Query Hardware Breakpoint information for the target we are attached to 00353 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */ 00354 static void 00355 arm_linux_init_hwbp_cap (int pid) 00356 { 00357 unsigned int val; 00358 00359 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0) 00360 return; 00361 00362 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff); 00363 if (arm_linux_hwbp_cap.arch == 0) 00364 return; 00365 00366 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff); 00367 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff); 00368 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff); 00369 00370 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS) 00371 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints"); 00372 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS) 00373 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints"); 00374 } 00375 00376 /* How many hardware breakpoints are available? */ 00377 static int 00378 arm_linux_get_hw_breakpoint_count (void) 00379 { 00380 return arm_linux_hwbp_cap.bp_count; 00381 } 00382 00383 /* How many hardware watchpoints are available? */ 00384 static int 00385 arm_linux_get_hw_watchpoint_count (void) 00386 { 00387 return arm_linux_hwbp_cap.wp_count; 00388 } 00389 00390 /* Maximum length of area watched by hardware watchpoint. */ 00391 static int 00392 arm_linux_get_hw_watchpoint_max_length (void) 00393 { 00394 return arm_linux_hwbp_cap.max_wp_length; 00395 } 00396 00397 /* Initialize an ARM hardware break-/watch-point control register value. 00398 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the 00399 type of break-/watch-point; ENABLE indicates whether the point is enabled. 00400 */ 00401 static arm_hwbp_control_t 00402 arm_hwbp_control_initialize (unsigned byte_address_select, 00403 arm_hwbp_type hwbp_type, 00404 int enable) 00405 { 00406 gdb_assert ((byte_address_select & ~0xffU) == 0); 00407 gdb_assert (hwbp_type != arm_hwbp_break 00408 || ((byte_address_select & 0xfU) != 0)); 00409 00410 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable; 00411 } 00412 00413 /* Does the breakpoint control value CONTROL have the enable bit set? */ 00414 static int 00415 arm_hwbp_control_is_enabled (arm_hwbp_control_t control) 00416 { 00417 return control & 0x1; 00418 } 00419 00420 /* Is the breakpoint control value CONTROL initialized? */ 00421 static int 00422 arm_hwbp_control_is_initialized (arm_hwbp_control_t control) 00423 { 00424 return control != 0; 00425 } 00426 00427 /* Change a breakpoint control word so that it is in the disabled state. */ 00428 static arm_hwbp_control_t 00429 arm_hwbp_control_disable (arm_hwbp_control_t control) 00430 { 00431 return control & ~0x1; 00432 } 00433 00434 /* Are two break-/watch-points equal? */ 00435 static int 00436 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1, 00437 const struct arm_linux_hw_breakpoint *p2) 00438 { 00439 return p1->address == p2->address && p1->control == p2->control; 00440 } 00441 00442 /* Initialize the hardware breakpoint structure P for a breakpoint or 00443 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE. 00444 Returns -1 if TYPE is unsupported, or -2 if the particular combination 00445 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE 00446 represents a breakpoint and 1 if type represents a watchpoint. */ 00447 static int 00448 arm_linux_hw_point_initialize (char type, CORE_ADDR addr, int len, 00449 struct arm_linux_hw_breakpoint *p) 00450 { 00451 arm_hwbp_type hwbp_type; 00452 unsigned mask; 00453 00454 /* Breakpoint/watchpoint types (GDB terminology): 00455 0 = memory breakpoint for instructions 00456 (not supported; done via memory write instead) 00457 1 = hardware breakpoint for instructions (supported) 00458 2 = write watchpoint (supported) 00459 3 = read watchpoint (supported) 00460 4 = access watchpoint (supported). */ 00461 switch (type) 00462 { 00463 case '1': 00464 hwbp_type = arm_hwbp_break; 00465 break; 00466 case '2': 00467 hwbp_type = arm_hwbp_store; 00468 break; 00469 case '3': 00470 hwbp_type = arm_hwbp_load; 00471 break; 00472 case '4': 00473 hwbp_type = arm_hwbp_access; 00474 break; 00475 default: 00476 /* Unsupported. */ 00477 return -1; 00478 } 00479 00480 if (hwbp_type == arm_hwbp_break) 00481 { 00482 /* For breakpoints, the length field encodes the mode. */ 00483 switch (len) 00484 { 00485 case 2: /* 16-bit Thumb mode breakpoint */ 00486 case 3: /* 32-bit Thumb mode breakpoint */ 00487 mask = 0x3; 00488 addr &= ~1; 00489 break; 00490 case 4: /* 32-bit ARM mode breakpoint */ 00491 mask = 0xf; 00492 addr &= ~3; 00493 break; 00494 default: 00495 /* Unsupported. */ 00496 return -2; 00497 } 00498 } 00499 else 00500 { 00501 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length (); 00502 CORE_ADDR aligned_addr; 00503 00504 /* Can not set watchpoints for zero or negative lengths. */ 00505 if (len <= 0) 00506 return -2; 00507 /* The current ptrace interface can only handle watchpoints that are a 00508 power of 2. */ 00509 if ((len & (len - 1)) != 0) 00510 return -2; 00511 00512 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address 00513 range covered by a watchpoint. */ 00514 aligned_addr = addr & ~(max_wp_length - 1); 00515 if (aligned_addr + max_wp_length < addr + len) 00516 return -2; 00517 00518 mask = (1 << len) - 1; 00519 } 00520 00521 p->address = (unsigned int) addr; 00522 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1); 00523 00524 return hwbp_type != arm_hwbp_break; 00525 } 00526 00527 /* Callback to mark a watch-/breakpoint to be updated in all threads of 00528 the current process. */ 00529 00530 struct update_registers_data 00531 { 00532 int watch; 00533 int i; 00534 }; 00535 00536 static int 00537 update_registers_callback (struct inferior_list_entry *entry, void *arg) 00538 { 00539 struct lwp_info *lwp = (struct lwp_info *) entry; 00540 struct update_registers_data *data = (struct update_registers_data *) arg; 00541 00542 /* Only update the threads of the current process. */ 00543 if (pid_of (lwp) == pid_of (get_thread_lwp (current_inferior))) 00544 { 00545 /* The actual update is done later just before resuming the lwp, 00546 we just mark that the registers need updating. */ 00547 if (data->watch) 00548 lwp->arch_private->wpts_changed[data->i] = 1; 00549 else 00550 lwp->arch_private->bpts_changed[data->i] = 1; 00551 00552 /* If the lwp isn't stopped, force it to momentarily pause, so 00553 we can update its breakpoint registers. */ 00554 if (!lwp->stopped) 00555 linux_stop_lwp (lwp); 00556 } 00557 00558 return 0; 00559 } 00560 00561 /* Insert hardware break-/watchpoint. */ 00562 static int 00563 arm_insert_point (char type, CORE_ADDR addr, int len) 00564 { 00565 struct process_info *proc = current_process (); 00566 struct arm_linux_hw_breakpoint p, *pts; 00567 int watch, i, count; 00568 00569 watch = arm_linux_hw_point_initialize (type, addr, len, &p); 00570 if (watch < 0) 00571 { 00572 /* Unsupported. */ 00573 return watch == -1 ? 1 : -1; 00574 } 00575 00576 if (watch) 00577 { 00578 count = arm_linux_get_hw_watchpoint_count (); 00579 pts = proc->private->arch_private->wpts; 00580 } 00581 else 00582 { 00583 count = arm_linux_get_hw_breakpoint_count (); 00584 pts = proc->private->arch_private->bpts; 00585 } 00586 00587 for (i = 0; i < count; i++) 00588 if (!arm_hwbp_control_is_enabled (pts[i].control)) 00589 { 00590 struct update_registers_data data = { watch, i }; 00591 pts[i] = p; 00592 find_inferior (&all_lwps, update_registers_callback, &data); 00593 return 0; 00594 } 00595 00596 /* We're out of watchpoints. */ 00597 return -1; 00598 } 00599 00600 /* Remove hardware break-/watchpoint. */ 00601 static int 00602 arm_remove_point (char type, CORE_ADDR addr, int len) 00603 { 00604 struct process_info *proc = current_process (); 00605 struct arm_linux_hw_breakpoint p, *pts; 00606 int watch, i, count; 00607 00608 watch = arm_linux_hw_point_initialize (type, addr, len, &p); 00609 if (watch < 0) 00610 { 00611 /* Unsupported. */ 00612 return -1; 00613 } 00614 00615 if (watch) 00616 { 00617 count = arm_linux_get_hw_watchpoint_count (); 00618 pts = proc->private->arch_private->wpts; 00619 } 00620 else 00621 { 00622 count = arm_linux_get_hw_breakpoint_count (); 00623 pts = proc->private->arch_private->bpts; 00624 } 00625 00626 for (i = 0; i < count; i++) 00627 if (arm_linux_hw_breakpoint_equal (&p, pts + i)) 00628 { 00629 struct update_registers_data data = { watch, i }; 00630 pts[i].control = arm_hwbp_control_disable (pts[i].control); 00631 find_inferior (&all_lwps, update_registers_callback, &data); 00632 return 0; 00633 } 00634 00635 /* No watchpoint matched. */ 00636 return -1; 00637 } 00638 00639 /* Return whether current thread is stopped due to a watchpoint. */ 00640 static int 00641 arm_stopped_by_watchpoint (void) 00642 { 00643 struct lwp_info *lwp = get_thread_lwp (current_inferior); 00644 siginfo_t siginfo; 00645 00646 /* We must be able to set hardware watchpoints. */ 00647 if (arm_linux_get_hw_watchpoint_count () == 0) 00648 return 0; 00649 00650 /* Retrieve siginfo. */ 00651 errno = 0; 00652 ptrace (PTRACE_GETSIGINFO, lwpid_of (lwp), 0, &siginfo); 00653 if (errno != 0) 00654 return 0; 00655 00656 /* This must be a hardware breakpoint. */ 00657 if (siginfo.si_signo != SIGTRAP 00658 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */) 00659 return 0; 00660 00661 /* If we are in a positive slot then we're looking at a breakpoint and not 00662 a watchpoint. */ 00663 if (siginfo.si_errno >= 0) 00664 return 0; 00665 00666 /* Cache stopped data address for use by arm_stopped_data_address. */ 00667 lwp->arch_private->stopped_data_address 00668 = (CORE_ADDR) (uintptr_t) siginfo.si_addr; 00669 00670 return 1; 00671 } 00672 00673 /* Return data address that triggered watchpoint. Called only if 00674 arm_stopped_by_watchpoint returned true. */ 00675 static CORE_ADDR 00676 arm_stopped_data_address (void) 00677 { 00678 struct lwp_info *lwp = get_thread_lwp (current_inferior); 00679 return lwp->arch_private->stopped_data_address; 00680 } 00681 00682 /* Called when a new process is created. */ 00683 static struct arch_process_info * 00684 arm_new_process (void) 00685 { 00686 struct arch_process_info *info = xcalloc (1, sizeof (*info)); 00687 return info; 00688 } 00689 00690 /* Called when a new thread is detected. */ 00691 static struct arch_lwp_info * 00692 arm_new_thread (void) 00693 { 00694 struct arch_lwp_info *info = xcalloc (1, sizeof (*info)); 00695 int i; 00696 00697 for (i = 0; i < MAX_BPTS; i++) 00698 info->bpts_changed[i] = 1; 00699 for (i = 0; i < MAX_WPTS; i++) 00700 info->wpts_changed[i] = 1; 00701 00702 return info; 00703 } 00704 00705 /* Called when resuming a thread. 00706 If the debug regs have changed, update the thread's copies. */ 00707 static void 00708 arm_prepare_to_resume (struct lwp_info *lwp) 00709 { 00710 int pid = lwpid_of (lwp); 00711 struct process_info *proc = find_process_pid (pid_of (lwp)); 00712 struct arch_process_info *proc_info = proc->private->arch_private; 00713 struct arch_lwp_info *lwp_info = lwp->arch_private; 00714 int i; 00715 00716 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++) 00717 if (lwp_info->bpts_changed[i]) 00718 { 00719 errno = 0; 00720 00721 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control)) 00722 if (ptrace (PTRACE_SETHBPREGS, pid, 00723 (PTRACE_TYPE_ARG3) ((i << 1) + 1), 00724 &proc_info->bpts[i].address) < 0) 00725 perror_with_name ("Unexpected error setting breakpoint address"); 00726 00727 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control)) 00728 if (ptrace (PTRACE_SETHBPREGS, pid, 00729 (PTRACE_TYPE_ARG3) ((i << 1) + 2), 00730 &proc_info->bpts[i].control) < 0) 00731 perror_with_name ("Unexpected error setting breakpoint"); 00732 00733 lwp_info->bpts_changed[i] = 0; 00734 } 00735 00736 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++) 00737 if (lwp_info->wpts_changed[i]) 00738 { 00739 errno = 0; 00740 00741 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control)) 00742 if (ptrace (PTRACE_SETHBPREGS, pid, 00743 (PTRACE_TYPE_ARG3) -((i << 1) + 1), 00744 &proc_info->wpts[i].address) < 0) 00745 perror_with_name ("Unexpected error setting watchpoint address"); 00746 00747 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control)) 00748 if (ptrace (PTRACE_SETHBPREGS, pid, 00749 (PTRACE_TYPE_ARG3) -((i << 1) + 2), 00750 &proc_info->wpts[i].control) < 0) 00751 perror_with_name ("Unexpected error setting watchpoint"); 00752 00753 lwp_info->wpts_changed[i] = 0; 00754 } 00755 } 00756 00757 00758 static int 00759 arm_get_hwcap (unsigned long *valp) 00760 { 00761 unsigned char *data = alloca (8); 00762 int offset = 0; 00763 00764 while ((*the_target->read_auxv) (offset, data, 8) == 8) 00765 { 00766 unsigned int *data_p = (unsigned int *)data; 00767 if (data_p[0] == AT_HWCAP) 00768 { 00769 *valp = data_p[1]; 00770 return 1; 00771 } 00772 00773 offset += 8; 00774 } 00775 00776 *valp = 0; 00777 return 0; 00778 } 00779 00780 static const struct target_desc * 00781 arm_read_description (void) 00782 { 00783 int pid = lwpid_of (get_thread_lwp (current_inferior)); 00784 00785 /* Query hardware watchpoint/breakpoint capabilities. */ 00786 arm_linux_init_hwbp_cap (pid); 00787 00788 arm_hwcap = 0; 00789 if (arm_get_hwcap (&arm_hwcap) == 0) 00790 return tdesc_arm; 00791 00792 if (arm_hwcap & HWCAP_IWMMXT) 00793 return tdesc_arm_with_iwmmxt; 00794 00795 if (arm_hwcap & HWCAP_VFP) 00796 { 00797 const struct target_desc *result; 00798 char *buf; 00799 00800 /* NEON implies either no VFP, or VFPv3-D32. We only support 00801 it with VFP. */ 00802 if (arm_hwcap & HWCAP_NEON) 00803 result = tdesc_arm_with_neon; 00804 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) 00805 result = tdesc_arm_with_vfpv3; 00806 else 00807 result = tdesc_arm_with_vfpv2; 00808 00809 /* Now make sure that the kernel supports reading these 00810 registers. Support was added in 2.6.30. */ 00811 errno = 0; 00812 buf = xmalloc (32 * 8 + 4); 00813 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 00814 && errno == EIO) 00815 { 00816 arm_hwcap = 0; 00817 result = tdesc_arm; 00818 } 00819 free (buf); 00820 00821 return result; 00822 } 00823 00824 /* The default configuration uses legacy FPA registers, probably 00825 simulated. */ 00826 return tdesc_arm; 00827 } 00828 00829 static void 00830 arm_arch_setup (void) 00831 { 00832 current_process ()->tdesc = arm_read_description (); 00833 } 00834 00835 static struct regset_info arm_regsets[] = { 00836 { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4, 00837 GENERAL_REGS, 00838 arm_fill_gregset, arm_store_gregset }, 00839 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4, 00840 EXTENDED_REGS, 00841 arm_fill_wmmxregset, arm_store_wmmxregset }, 00842 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4, 00843 EXTENDED_REGS, 00844 arm_fill_vfpregset, arm_store_vfpregset }, 00845 { 0, 0, 0, -1, -1, NULL, NULL } 00846 }; 00847 00848 static struct regsets_info arm_regsets_info = 00849 { 00850 arm_regsets, /* regsets */ 00851 0, /* num_regsets */ 00852 NULL, /* disabled_regsets */ 00853 }; 00854 00855 static struct usrregs_info arm_usrregs_info = 00856 { 00857 arm_num_regs, 00858 arm_regmap, 00859 }; 00860 00861 static struct regs_info regs_info = 00862 { 00863 NULL, /* regset_bitmap */ 00864 &arm_usrregs_info, 00865 &arm_regsets_info 00866 }; 00867 00868 static const struct regs_info * 00869 arm_regs_info (void) 00870 { 00871 return ®s_info; 00872 } 00873 00874 struct linux_target_ops the_low_target = { 00875 arm_arch_setup, 00876 arm_regs_info, 00877 arm_cannot_fetch_register, 00878 arm_cannot_store_register, 00879 NULL, /* fetch_register */ 00880 arm_get_pc, 00881 arm_set_pc, 00882 00883 /* Define an ARM-mode breakpoint; we only set breakpoints in the C 00884 library, which is most likely to be ARM. If the kernel supports 00885 clone events, we will never insert a breakpoint, so even a Thumb 00886 C library will work; so will mixing EABI/non-EABI gdbserver and 00887 application. */ 00888 #ifndef __ARM_EABI__ 00889 (const unsigned char *) &arm_breakpoint, 00890 #else 00891 (const unsigned char *) &arm_eabi_breakpoint, 00892 #endif 00893 arm_breakpoint_len, 00894 arm_reinsert_addr, 00895 0, 00896 arm_breakpoint_at, 00897 arm_insert_point, 00898 arm_remove_point, 00899 arm_stopped_by_watchpoint, 00900 arm_stopped_data_address, 00901 NULL, /* collect_ptrace_register */ 00902 NULL, /* supply_ptrace_register */ 00903 NULL, /* siginfo_fixup */ 00904 arm_new_process, 00905 arm_new_thread, 00906 arm_prepare_to_resume, 00907 }; 00908 00909 void 00910 initialize_low_arch (void) 00911 { 00912 /* Initialize the Linux target descriptions. */ 00913 init_registers_arm (); 00914 init_registers_arm_with_iwmmxt (); 00915 init_registers_arm_with_vfpv2 (); 00916 init_registers_arm_with_vfpv3 (); 00917 init_registers_arm_with_neon (); 00918 00919 initialize_regsets_info (&arm_regsets_info); 00920 }