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00001 /* Misc. low level support for i386.
00002 
00003    Copyright (C) 2009-2013 Free Software Foundation, Inc.
00004 
00005    This file is part of GDB.
00006 
00007    This program is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 3 of the License, or
00010    (at your option) any later version.
00011 
00012    This program is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
00019 
00020 /* Support for hardware watchpoints and breakpoints using the i386
00021    debug registers.
00022 
00023    This provides several functions for inserting and removing
00024    hardware-assisted breakpoints and watchpoints, testing if one or
00025    more of the watchpoints triggered and at what address, checking
00026    whether a given region can be watched, etc.
00027 
00028    The functions below implement debug registers sharing by reference
00029    counts, and allow to watch regions up to 16 bytes long
00030    (32 bytes on 64 bit hosts).  */
00031 
00032 
00033 /* Debug registers' indices.  */
00034 #define DR_FIRSTADDR 0
00035 #define DR_LASTADDR  3
00036 #define DR_NADDR     4 /* The number of debug address registers.  */
00037 #define DR_STATUS    6
00038 #define DR_CONTROL   7
00039 
00040 /* Global state needed to track h/w watchpoints.  */
00041 
00042 struct i386_debug_reg_state
00043 {
00044   /* Mirror the inferior's DRi registers.  We keep the status and
00045      control registers separated because they don't hold addresses.
00046      Note that since we can change these mirrors while threads are
00047      running, we never trust them to explain a cause of a trap.
00048      For that, we need to peek directly in the inferior registers.  */
00049   CORE_ADDR dr_mirror[DR_NADDR];
00050   unsigned dr_status_mirror, dr_control_mirror;
00051 
00052   /* Reference counts for each debug register.  */
00053   int dr_ref_count[DR_NADDR];
00054 };
00055 
00056 /* Initialize STATE.  */
00057 extern void i386_low_init_dregs (struct i386_debug_reg_state *state);
00058 
00059 /* Insert a watchpoint to watch a memory region which starts at
00060    address ADDR and whose length is LEN bytes.  Watch memory accesses
00061    of the type TYPE_FROM_PACKET.  Return 0 on success, -1 on failure.  */
00062 extern int i386_low_insert_watchpoint (struct i386_debug_reg_state *state,
00063                                        char type_from_packet, CORE_ADDR addr,
00064                                        int len);
00065 
00066 /* Remove a watchpoint that watched the memory region which starts at
00067    address ADDR, whose length is LEN bytes, and for accesses of the
00068    type TYPE_FROM_PACKET.  Return 0 on success, -1 on failure.  */
00069 extern int i386_low_remove_watchpoint (struct i386_debug_reg_state *state,
00070                                        char type_from_packet, CORE_ADDR addr,
00071                                        int len);
00072 
00073 /* Return non-zero if we can watch a memory region that starts at
00074    address ADDR and whose length is LEN bytes.  */
00075 extern int i386_low_region_ok_for_watchpoint (struct i386_debug_reg_state *state,
00076                                               CORE_ADDR addr, int len);
00077 
00078 /* If the inferior has some break/watchpoint that triggered, set the
00079    address associated with that break/watchpoint and return true.
00080    Otherwise, return false.  */
00081 extern int i386_low_stopped_data_address (struct i386_debug_reg_state *state,
00082                                           CORE_ADDR *addr_p);
00083 
00084 /* Return true if the inferior has some watchpoint that triggered.
00085    Otherwise return false.  */
00086 extern int i386_low_stopped_by_watchpoint (struct i386_debug_reg_state *state);
00087 
00088 /* Each target needs to provide several low-level functions
00089    that will be called to insert watchpoints and hardware breakpoints
00090    into the inferior, remove them, and check their status.  These
00091    functions are:
00092 
00093       i386_dr_low_set_control  -- set the debug control (DR7)
00094                                   register to a given value
00095 
00096       i386_dr_low_set_addr     -- put an address into one debug register
00097 
00098       i386_dr_low_get_status   -- return the value of the debug
00099                                   status (DR6) register.
00100 */
00101 
00102 /* Update the inferior's debug register REGNUM from STATE.  */
00103 extern void i386_dr_low_set_addr (const struct i386_debug_reg_state *state,
00104                                   int regnum);
00105 
00106 /* Return the inferior's debug register REGNUM.  */
00107 extern CORE_ADDR i386_dr_low_get_addr (int regnum);
00108 
00109 /* Update the inferior's DR7 debug control register from STATE.  */
00110 extern void i386_dr_low_set_control (const struct i386_debug_reg_state *state);
00111 
00112 /* Return the value of the inferior's DR7 debug control register.  */
00113 extern unsigned i386_dr_low_get_control (void);
00114 
00115 /* Return the value of the inferior's DR6 debug status register.  */
00116 extern unsigned i386_dr_low_get_status (void);
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