GDB (API)
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00001 /* SPU target-dependent code for GDB, the GNU debugger. 00002 Copyright (C) 2006-2013 Free Software Foundation, Inc. 00003 00004 This file is part of GDB. 00005 00006 This program is free software; you can redistribute it and/or modify 00007 it under the terms of the GNU General Public License as published by 00008 the Free Software Foundation; either version 3 of the License, or 00009 (at your option) any later version. 00010 00011 This program is distributed in the hope that it will be useful, 00012 but WITHOUT ANY WARRANTY; without even the implied warranty of 00013 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00014 GNU General Public License for more details. 00015 00016 You should have received a copy of the GNU General Public License 00017 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 00018 00019 #ifndef SPU_TDEP_H 00020 #define SPU_TDEP_H 00021 00022 /* Number of registers. */ 00023 #define SPU_NUM_REGS 130 00024 #define SPU_NUM_PSEUDO_REGS 6 00025 #define SPU_NUM_GPRS 128 00026 00027 /* Register numbers of various important registers. */ 00028 enum spu_regnum 00029 { 00030 /* SPU calling convention. */ 00031 SPU_LR_REGNUM = 0, /* Link register. */ 00032 SPU_RAW_SP_REGNUM = 1, /* Stack pointer (full register). */ 00033 SPU_ARG1_REGNUM = 3, /* First argument register. */ 00034 SPU_ARGN_REGNUM = 74, /* Last argument register. */ 00035 SPU_SAVED1_REGNUM = 80, /* First call-saved register. */ 00036 SPU_SAVEDN_REGNUM = 127, /* Last call-saved register. */ 00037 SPU_FP_REGNUM = 127, /* Frame pointer. */ 00038 00039 /* Special registers. */ 00040 SPU_ID_REGNUM = 128, /* SPU ID register. */ 00041 SPU_PC_REGNUM = 129, /* Next program counter. */ 00042 SPU_SP_REGNUM = 130, /* Stack pointer (preferred slot). */ 00043 SPU_FPSCR_REGNUM = 131, /* Floating point status/control register. */ 00044 SPU_SRR0_REGNUM = 132, /* SRR0 register. */ 00045 SPU_LSLR_REGNUM = 133, /* Local store limit register. */ 00046 SPU_DECR_REGNUM = 134, /* Decrementer value. */ 00047 SPU_DECR_STATUS_REGNUM = 135 /* Decrementer status. */ 00048 }; 00049 00050 /* Address conversions. 00051 00052 In a combined PPU/SPU debugging session, we have to consider multiple 00053 address spaces: the PPU 32- or 64-bit address space, and the 32-bit 00054 local store address space for each SPU context. As it is currently 00055 not yet possible to use the program_space / address_space mechanism 00056 to represent this, we encode all those addresses into one single 00057 64-bit address for the whole process. For SPU programs using overlays, 00058 this address space must also include separate ranges reserved for the 00059 LMA of overlay sections. 00060 00061 00062 The following combinations are supported for combined debugging: 00063 00064 PPU address (this relies on the fact that PPC 64-bit user space 00065 addresses can never have the highest-most bit set): 00066 00067 +-+---------------------------------+ 00068 |0| ADDR [63] | 00069 +-+---------------------------------+ 00070 00071 SPU address for SPU context with id SPU (this assumes that SPU 00072 IDs, which are file descriptors, are never larger than 2^30): 00073 00074 +-+-+--------------+----------------+ 00075 |1|0| SPU [30] | ADDR [32] | 00076 +-+-+--------------+----------------+ 00077 00078 SPU overlay section LMA for SPU context with id SPU: 00079 00080 +-+-+--------------+----------------+ 00081 |1|1| SPU [30] | ADDR [32] | 00082 +-+-+--------------+----------------+ 00083 00084 00085 In SPU stand-alone debugging mode (using spu-linux-nat.c), 00086 the following combinations are supported: 00087 00088 SPU address: 00089 00090 +-+-+--------------+----------------+ 00091 |0|0| 0 | ADDR [32] | 00092 +-+-+--------------+----------------+ 00093 00094 SPU overlay section LMA: 00095 00096 +-+-+--------------+----------------+ 00097 |0|1| 0 | ADDR [32] | 00098 +-+-+--------------+----------------+ 00099 00100 00101 The following macros allow manipulation of addresses in the 00102 above formats. */ 00103 00104 #define SPUADDR(spu, addr) \ 00105 ((spu) != -1? (ULONGEST)1 << 63 | (ULONGEST)(spu) << 32 | (addr) : (addr)) 00106 00107 #define SPUADDR_SPU(addr) \ 00108 (((addr) & (ULONGEST)1 << 63) \ 00109 ? (int) ((ULONGEST)(addr) >> 32 & 0x3fffffff) \ 00110 : -1) 00111 00112 #define SPUADDR_ADDR(addr) \ 00113 (((addr) & (ULONGEST)1 << 63)? (ULONGEST)(addr) & 0xffffffff : (addr)) 00114 00115 #define SPU_OVERLAY_LMA ((ULONGEST)1 << 62) 00116 00117 #endif