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00001 /* This file defines the interface between the m32c simulator and gdb.
00002    Copyright (C) 2005-2013 Free Software Foundation, Inc.
00003 
00004    This file is part of GDB.
00005 
00006    This program is free software; you can redistribute it and/or modify
00007    it under the terms of the GNU General Public License as published by
00008    the Free Software Foundation; either version 3 of the License, or
00009    (at your option) any later version.
00010 
00011    This program is distributed in the hope that it will be useful,
00012    but WITHOUT ANY WARRANTY; without even the implied warranty of
00013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014    GNU General Public License for more details.
00015 
00016    You should have received a copy of the GNU General Public License
00017    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
00018 
00019 #ifndef SIM_M32C_H
00020 #define SIM_M32C_H
00021 
00022 enum m32c_sim_reg {
00023   m32c_sim_reg_r0_bank0,
00024   m32c_sim_reg_r1_bank0,
00025   m32c_sim_reg_r2_bank0,
00026   m32c_sim_reg_r3_bank0,
00027   m32c_sim_reg_a0_bank0,
00028   m32c_sim_reg_a1_bank0,
00029   m32c_sim_reg_fb_bank0,
00030   m32c_sim_reg_sb_bank0,
00031   m32c_sim_reg_r0_bank1,
00032   m32c_sim_reg_r1_bank1,
00033   m32c_sim_reg_r2_bank1,
00034   m32c_sim_reg_r3_bank1,
00035   m32c_sim_reg_a0_bank1,
00036   m32c_sim_reg_a1_bank1,
00037   m32c_sim_reg_fb_bank1,
00038   m32c_sim_reg_sb_bank1,
00039   m32c_sim_reg_usp,
00040   m32c_sim_reg_isp,
00041   m32c_sim_reg_pc,
00042   m32c_sim_reg_intb,
00043   m32c_sim_reg_flg,
00044   m32c_sim_reg_svf,
00045   m32c_sim_reg_svp,
00046   m32c_sim_reg_vct,
00047   m32c_sim_reg_dmd0,
00048   m32c_sim_reg_dmd1,
00049   m32c_sim_reg_dct0,
00050   m32c_sim_reg_dct1,
00051   m32c_sim_reg_drc0,
00052   m32c_sim_reg_drc1,
00053   m32c_sim_reg_dma0,
00054   m32c_sim_reg_dma1,
00055   m32c_sim_reg_dsa0,
00056   m32c_sim_reg_dsa1,
00057   m32c_sim_reg_dra0,
00058   m32c_sim_reg_dra1,
00059   m32c_sim_reg_num_regs
00060 };
00061 
00062 #endif /* SIM_M32C_H */
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