GDB (API)
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00001 /* Target-dependent code for GDB, the GNU debugger. 00002 00003 Copyright (C) 2001-2013 Free Software Foundation, Inc. 00004 00005 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 00006 for IBM Deutschland Entwicklung GmbH, IBM Corporation. 00007 00008 This file is part of GDB. 00009 00010 This program is free software; you can redistribute it and/or modify 00011 it under the terms of the GNU General Public License as published by 00012 the Free Software Foundation; either version 3 of the License, or 00013 (at your option) any later version. 00014 00015 This program is distributed in the hope that it will be useful, 00016 but WITHOUT ANY WARRANTY; without even the implied warranty of 00017 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00018 GNU General Public License for more details. 00019 00020 You should have received a copy of the GNU General Public License 00021 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 00022 00023 #include "defs.h" 00024 #include "arch-utils.h" 00025 #include "frame.h" 00026 #include "inferior.h" 00027 #include "symtab.h" 00028 #include "target.h" 00029 #include "gdbcore.h" 00030 #include "gdbcmd.h" 00031 #include "objfiles.h" 00032 #include "floatformat.h" 00033 #include "regcache.h" 00034 #include "trad-frame.h" 00035 #include "frame-base.h" 00036 #include "frame-unwind.h" 00037 #include "dwarf2-frame.h" 00038 #include "reggroups.h" 00039 #include "regset.h" 00040 #include "value.h" 00041 #include "gdb_assert.h" 00042 #include "dis-asm.h" 00043 #include "solib-svr4.h" 00044 #include "prologue-value.h" 00045 #include "linux-tdep.h" 00046 #include "s390-tdep.h" 00047 #include "auxv.h" 00048 00049 #include "stap-probe.h" 00050 #include "ax.h" 00051 #include "ax-gdb.h" 00052 #include "user-regs.h" 00053 #include "cli/cli-utils.h" 00054 #include <ctype.h> 00055 #include "elf/common.h" 00056 00057 #include "features/s390-linux32.c" 00058 #include "features/s390-linux32v1.c" 00059 #include "features/s390-linux32v2.c" 00060 #include "features/s390-linux64.c" 00061 #include "features/s390-linux64v1.c" 00062 #include "features/s390-linux64v2.c" 00063 #include "features/s390-te-linux64.c" 00064 #include "features/s390x-linux64.c" 00065 #include "features/s390x-linux64v1.c" 00066 #include "features/s390x-linux64v2.c" 00067 #include "features/s390x-te-linux64.c" 00068 00069 /* The tdep structure. */ 00070 00071 struct gdbarch_tdep 00072 { 00073 /* ABI version. */ 00074 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; 00075 00076 /* Pseudo register numbers. */ 00077 int gpr_full_regnum; 00078 int pc_regnum; 00079 int cc_regnum; 00080 00081 /* Core file register sets. */ 00082 const struct regset *gregset; 00083 int sizeof_gregset; 00084 00085 const struct regset *fpregset; 00086 int sizeof_fpregset; 00087 }; 00088 00089 00090 /* ABI call-saved register information. */ 00091 00092 static int 00093 s390_register_call_saved (struct gdbarch *gdbarch, int regnum) 00094 { 00095 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00096 00097 switch (tdep->abi) 00098 { 00099 case ABI_LINUX_S390: 00100 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) 00101 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM 00102 || regnum == S390_A0_REGNUM) 00103 return 1; 00104 00105 break; 00106 00107 case ABI_LINUX_ZSERIES: 00108 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) 00109 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) 00110 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) 00111 return 1; 00112 00113 break; 00114 } 00115 00116 return 0; 00117 } 00118 00119 static int 00120 s390_cannot_store_register (struct gdbarch *gdbarch, int regnum) 00121 { 00122 /* The last-break address is read-only. */ 00123 return regnum == S390_LAST_BREAK_REGNUM; 00124 } 00125 00126 static void 00127 s390_write_pc (struct regcache *regcache, CORE_ADDR pc) 00128 { 00129 struct gdbarch *gdbarch = get_regcache_arch (regcache); 00130 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00131 00132 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc); 00133 00134 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from 00135 messing with the PC we just installed, if we happen to be within 00136 an interrupted system call that the kernel wants to restart. 00137 00138 Note that after we return from the dummy call, the SYSTEM_CALL and 00139 ORIG_R2 registers will be automatically restored, and the kernel 00140 continues to restart the system call at this point. */ 00141 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0) 00142 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0); 00143 } 00144 00145 00146 /* DWARF Register Mapping. */ 00147 00148 static const short s390_dwarf_regmap[] = 00149 { 00150 /* General Purpose Registers. */ 00151 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, 00152 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, 00153 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, 00154 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, 00155 00156 /* Floating Point Registers. */ 00157 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, 00158 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, 00159 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, 00160 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, 00161 00162 /* Control Registers (not mapped). */ 00163 -1, -1, -1, -1, -1, -1, -1, -1, 00164 -1, -1, -1, -1, -1, -1, -1, -1, 00165 00166 /* Access Registers. */ 00167 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, 00168 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, 00169 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, 00170 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, 00171 00172 /* Program Status Word. */ 00173 S390_PSWM_REGNUM, 00174 S390_PSWA_REGNUM, 00175 00176 /* GPR Lower Half Access. */ 00177 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, 00178 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, 00179 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, 00180 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, 00181 00182 /* GNU/Linux-specific registers (not mapped). */ 00183 -1, -1, -1, 00184 }; 00185 00186 /* Convert DWARF register number REG to the appropriate register 00187 number used by GDB. */ 00188 static int 00189 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) 00190 { 00191 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00192 00193 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit 00194 GPRs. Note that call frame information still refers to the 32-bit 00195 lower halves, because s390_adjust_frame_regnum uses register numbers 00196 66 .. 81 to access GPRs. */ 00197 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) 00198 return tdep->gpr_full_regnum + reg; 00199 00200 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) 00201 return s390_dwarf_regmap[reg]; 00202 00203 warning (_("Unmapped DWARF Register #%d encountered."), reg); 00204 return -1; 00205 } 00206 00207 /* Translate a .eh_frame register to DWARF register, or adjust a 00208 .debug_frame register. */ 00209 static int 00210 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) 00211 { 00212 /* See s390_dwarf_reg_to_regnum for comments. */ 00213 return (num >= 0 && num < 16)? num + 66 : num; 00214 } 00215 00216 00217 /* Pseudo registers. */ 00218 00219 static int 00220 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum) 00221 { 00222 return (tdep->gpr_full_regnum != -1 00223 && regnum >= tdep->gpr_full_regnum 00224 && regnum <= tdep->gpr_full_regnum + 15); 00225 } 00226 00227 static const char * 00228 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) 00229 { 00230 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00231 00232 if (regnum == tdep->pc_regnum) 00233 return "pc"; 00234 00235 if (regnum == tdep->cc_regnum) 00236 return "cc"; 00237 00238 if (regnum_is_gpr_full (tdep, regnum)) 00239 { 00240 static const char *full_name[] = { 00241 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 00242 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 00243 }; 00244 return full_name[regnum - tdep->gpr_full_regnum]; 00245 } 00246 00247 internal_error (__FILE__, __LINE__, _("invalid regnum")); 00248 } 00249 00250 static struct type * 00251 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) 00252 { 00253 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00254 00255 if (regnum == tdep->pc_regnum) 00256 return builtin_type (gdbarch)->builtin_func_ptr; 00257 00258 if (regnum == tdep->cc_regnum) 00259 return builtin_type (gdbarch)->builtin_int; 00260 00261 if (regnum_is_gpr_full (tdep, regnum)) 00262 return builtin_type (gdbarch)->builtin_uint64; 00263 00264 internal_error (__FILE__, __LINE__, _("invalid regnum")); 00265 } 00266 00267 static enum register_status 00268 s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, 00269 int regnum, gdb_byte *buf) 00270 { 00271 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00272 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00273 int regsize = register_size (gdbarch, regnum); 00274 ULONGEST val; 00275 00276 if (regnum == tdep->pc_regnum) 00277 { 00278 enum register_status status; 00279 00280 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); 00281 if (status == REG_VALID) 00282 { 00283 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) 00284 val &= 0x7fffffff; 00285 store_unsigned_integer (buf, regsize, byte_order, val); 00286 } 00287 return status; 00288 } 00289 00290 if (regnum == tdep->cc_regnum) 00291 { 00292 enum register_status status; 00293 00294 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); 00295 if (status == REG_VALID) 00296 { 00297 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) 00298 val = (val >> 12) & 3; 00299 else 00300 val = (val >> 44) & 3; 00301 store_unsigned_integer (buf, regsize, byte_order, val); 00302 } 00303 return status; 00304 } 00305 00306 if (regnum_is_gpr_full (tdep, regnum)) 00307 { 00308 enum register_status status; 00309 ULONGEST val_upper; 00310 00311 regnum -= tdep->gpr_full_regnum; 00312 00313 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val); 00314 if (status == REG_VALID) 00315 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, 00316 &val_upper); 00317 if (status == REG_VALID) 00318 { 00319 val |= val_upper << 32; 00320 store_unsigned_integer (buf, regsize, byte_order, val); 00321 } 00322 return status; 00323 } 00324 00325 internal_error (__FILE__, __LINE__, _("invalid regnum")); 00326 } 00327 00328 static void 00329 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, 00330 int regnum, const gdb_byte *buf) 00331 { 00332 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00333 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00334 int regsize = register_size (gdbarch, regnum); 00335 ULONGEST val, psw; 00336 00337 if (regnum == tdep->pc_regnum) 00338 { 00339 val = extract_unsigned_integer (buf, regsize, byte_order); 00340 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) 00341 { 00342 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); 00343 val = (psw & 0x80000000) | (val & 0x7fffffff); 00344 } 00345 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); 00346 return; 00347 } 00348 00349 if (regnum == tdep->cc_regnum) 00350 { 00351 val = extract_unsigned_integer (buf, regsize, byte_order); 00352 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); 00353 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) 00354 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); 00355 else 00356 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); 00357 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); 00358 return; 00359 } 00360 00361 if (regnum_is_gpr_full (tdep, regnum)) 00362 { 00363 regnum -= tdep->gpr_full_regnum; 00364 val = extract_unsigned_integer (buf, regsize, byte_order); 00365 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, 00366 val & 0xffffffff); 00367 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, 00368 val >> 32); 00369 return; 00370 } 00371 00372 internal_error (__FILE__, __LINE__, _("invalid regnum")); 00373 } 00374 00375 /* 'float' values are stored in the upper half of floating-point 00376 registers, even though we are otherwise a big-endian platform. */ 00377 00378 static struct value * 00379 s390_value_from_register (struct type *type, int regnum, 00380 struct frame_info *frame) 00381 { 00382 struct value *value = default_value_from_register (type, regnum, frame); 00383 00384 check_typedef (type); 00385 00386 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM 00387 && TYPE_LENGTH (type) < 8) 00388 set_value_offset (value, 0); 00389 00390 return value; 00391 } 00392 00393 /* Register groups. */ 00394 00395 static int 00396 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 00397 struct reggroup *group) 00398 { 00399 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00400 00401 /* We usually save/restore the whole PSW, which includes PC and CC. 00402 However, some older gdbservers may not support saving/restoring 00403 the whole PSW yet, and will return an XML register description 00404 excluding those from the save/restore register groups. In those 00405 cases, we still need to explicitly save/restore PC and CC in order 00406 to push or pop frames. Since this doesn't hurt anything if we 00407 already save/restore the whole PSW (it's just redundant), we add 00408 PC and CC at this point unconditionally. */ 00409 if (group == save_reggroup || group == restore_reggroup) 00410 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; 00411 00412 return default_register_reggroup_p (gdbarch, regnum, group); 00413 } 00414 00415 00416 /* Maps for register sets. */ 00417 00418 const short s390_regmap_gregset[] = 00419 { 00420 0x00, S390_PSWM_REGNUM, 00421 0x04, S390_PSWA_REGNUM, 00422 0x08, S390_R0_REGNUM, 00423 0x0c, S390_R1_REGNUM, 00424 0x10, S390_R2_REGNUM, 00425 0x14, S390_R3_REGNUM, 00426 0x18, S390_R4_REGNUM, 00427 0x1c, S390_R5_REGNUM, 00428 0x20, S390_R6_REGNUM, 00429 0x24, S390_R7_REGNUM, 00430 0x28, S390_R8_REGNUM, 00431 0x2c, S390_R9_REGNUM, 00432 0x30, S390_R10_REGNUM, 00433 0x34, S390_R11_REGNUM, 00434 0x38, S390_R12_REGNUM, 00435 0x3c, S390_R13_REGNUM, 00436 0x40, S390_R14_REGNUM, 00437 0x44, S390_R15_REGNUM, 00438 0x48, S390_A0_REGNUM, 00439 0x4c, S390_A1_REGNUM, 00440 0x50, S390_A2_REGNUM, 00441 0x54, S390_A3_REGNUM, 00442 0x58, S390_A4_REGNUM, 00443 0x5c, S390_A5_REGNUM, 00444 0x60, S390_A6_REGNUM, 00445 0x64, S390_A7_REGNUM, 00446 0x68, S390_A8_REGNUM, 00447 0x6c, S390_A9_REGNUM, 00448 0x70, S390_A10_REGNUM, 00449 0x74, S390_A11_REGNUM, 00450 0x78, S390_A12_REGNUM, 00451 0x7c, S390_A13_REGNUM, 00452 0x80, S390_A14_REGNUM, 00453 0x84, S390_A15_REGNUM, 00454 0x88, S390_ORIG_R2_REGNUM, 00455 -1, -1 00456 }; 00457 00458 const short s390x_regmap_gregset[] = 00459 { 00460 0x00, S390_PSWM_REGNUM, 00461 0x08, S390_PSWA_REGNUM, 00462 0x10, S390_R0_REGNUM, 00463 0x18, S390_R1_REGNUM, 00464 0x20, S390_R2_REGNUM, 00465 0x28, S390_R3_REGNUM, 00466 0x30, S390_R4_REGNUM, 00467 0x38, S390_R5_REGNUM, 00468 0x40, S390_R6_REGNUM, 00469 0x48, S390_R7_REGNUM, 00470 0x50, S390_R8_REGNUM, 00471 0x58, S390_R9_REGNUM, 00472 0x60, S390_R10_REGNUM, 00473 0x68, S390_R11_REGNUM, 00474 0x70, S390_R12_REGNUM, 00475 0x78, S390_R13_REGNUM, 00476 0x80, S390_R14_REGNUM, 00477 0x88, S390_R15_REGNUM, 00478 0x90, S390_A0_REGNUM, 00479 0x94, S390_A1_REGNUM, 00480 0x98, S390_A2_REGNUM, 00481 0x9c, S390_A3_REGNUM, 00482 0xa0, S390_A4_REGNUM, 00483 0xa4, S390_A5_REGNUM, 00484 0xa8, S390_A6_REGNUM, 00485 0xac, S390_A7_REGNUM, 00486 0xb0, S390_A8_REGNUM, 00487 0xb4, S390_A9_REGNUM, 00488 0xb8, S390_A10_REGNUM, 00489 0xbc, S390_A11_REGNUM, 00490 0xc0, S390_A12_REGNUM, 00491 0xc4, S390_A13_REGNUM, 00492 0xc8, S390_A14_REGNUM, 00493 0xcc, S390_A15_REGNUM, 00494 0x10, S390_R0_UPPER_REGNUM, 00495 0x18, S390_R1_UPPER_REGNUM, 00496 0x20, S390_R2_UPPER_REGNUM, 00497 0x28, S390_R3_UPPER_REGNUM, 00498 0x30, S390_R4_UPPER_REGNUM, 00499 0x38, S390_R5_UPPER_REGNUM, 00500 0x40, S390_R6_UPPER_REGNUM, 00501 0x48, S390_R7_UPPER_REGNUM, 00502 0x50, S390_R8_UPPER_REGNUM, 00503 0x58, S390_R9_UPPER_REGNUM, 00504 0x60, S390_R10_UPPER_REGNUM, 00505 0x68, S390_R11_UPPER_REGNUM, 00506 0x70, S390_R12_UPPER_REGNUM, 00507 0x78, S390_R13_UPPER_REGNUM, 00508 0x80, S390_R14_UPPER_REGNUM, 00509 0x88, S390_R15_UPPER_REGNUM, 00510 0xd0, S390_ORIG_R2_REGNUM, 00511 -1, -1 00512 }; 00513 00514 const short s390_regmap_fpregset[] = 00515 { 00516 0x00, S390_FPC_REGNUM, 00517 0x08, S390_F0_REGNUM, 00518 0x10, S390_F1_REGNUM, 00519 0x18, S390_F2_REGNUM, 00520 0x20, S390_F3_REGNUM, 00521 0x28, S390_F4_REGNUM, 00522 0x30, S390_F5_REGNUM, 00523 0x38, S390_F6_REGNUM, 00524 0x40, S390_F7_REGNUM, 00525 0x48, S390_F8_REGNUM, 00526 0x50, S390_F9_REGNUM, 00527 0x58, S390_F10_REGNUM, 00528 0x60, S390_F11_REGNUM, 00529 0x68, S390_F12_REGNUM, 00530 0x70, S390_F13_REGNUM, 00531 0x78, S390_F14_REGNUM, 00532 0x80, S390_F15_REGNUM, 00533 -1, -1 00534 }; 00535 00536 const short s390_regmap_upper[] = 00537 { 00538 0x00, S390_R0_UPPER_REGNUM, 00539 0x04, S390_R1_UPPER_REGNUM, 00540 0x08, S390_R2_UPPER_REGNUM, 00541 0x0c, S390_R3_UPPER_REGNUM, 00542 0x10, S390_R4_UPPER_REGNUM, 00543 0x14, S390_R5_UPPER_REGNUM, 00544 0x18, S390_R6_UPPER_REGNUM, 00545 0x1c, S390_R7_UPPER_REGNUM, 00546 0x20, S390_R8_UPPER_REGNUM, 00547 0x24, S390_R9_UPPER_REGNUM, 00548 0x28, S390_R10_UPPER_REGNUM, 00549 0x2c, S390_R11_UPPER_REGNUM, 00550 0x30, S390_R12_UPPER_REGNUM, 00551 0x34, S390_R13_UPPER_REGNUM, 00552 0x38, S390_R14_UPPER_REGNUM, 00553 0x3c, S390_R15_UPPER_REGNUM, 00554 -1, -1 00555 }; 00556 00557 const short s390_regmap_last_break[] = 00558 { 00559 0x04, S390_LAST_BREAK_REGNUM, 00560 -1, -1 00561 }; 00562 00563 const short s390x_regmap_last_break[] = 00564 { 00565 0x00, S390_LAST_BREAK_REGNUM, 00566 -1, -1 00567 }; 00568 00569 const short s390_regmap_system_call[] = 00570 { 00571 0x00, S390_SYSTEM_CALL_REGNUM, 00572 -1, -1 00573 }; 00574 00575 const short s390_regmap_tdb[] = 00576 { 00577 0x00, S390_TDB_DWORD0_REGNUM, 00578 0x08, S390_TDB_ABORT_CODE_REGNUM, 00579 0x10, S390_TDB_CONFLICT_TOKEN_REGNUM, 00580 0x18, S390_TDB_ATIA_REGNUM, 00581 0x80, S390_TDB_R0_REGNUM, 00582 0x88, S390_TDB_R1_REGNUM, 00583 0x90, S390_TDB_R2_REGNUM, 00584 0x98, S390_TDB_R3_REGNUM, 00585 0xa0, S390_TDB_R4_REGNUM, 00586 0xa8, S390_TDB_R5_REGNUM, 00587 0xb0, S390_TDB_R6_REGNUM, 00588 0xb8, S390_TDB_R7_REGNUM, 00589 0xc0, S390_TDB_R8_REGNUM, 00590 0xc8, S390_TDB_R9_REGNUM, 00591 0xd0, S390_TDB_R10_REGNUM, 00592 0xd8, S390_TDB_R11_REGNUM, 00593 0xe0, S390_TDB_R12_REGNUM, 00594 0xe8, S390_TDB_R13_REGNUM, 00595 0xf0, S390_TDB_R14_REGNUM, 00596 0xf8, S390_TDB_R15_REGNUM, 00597 -1, -1 00598 }; 00599 00600 00601 /* Supply register REGNUM from the register set REGSET to register cache 00602 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ 00603 static void 00604 s390_supply_regset (const struct regset *regset, struct regcache *regcache, 00605 int regnum, const void *regs, size_t len) 00606 { 00607 const short *map; 00608 for (map = regset->descr; map[0] >= 0; map += 2) 00609 if (regnum == -1 || regnum == map[1]) 00610 regcache_raw_supply (regcache, map[1], 00611 regs ? (const char *)regs + map[0] : NULL); 00612 } 00613 00614 /* Supply the TDB regset. Like s390_supply_regset, but invalidate the 00615 TDB registers unless the TDB format field is valid. */ 00616 00617 static void 00618 s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache, 00619 int regnum, const void *regs, size_t len) 00620 { 00621 ULONGEST tdw; 00622 enum register_status ret; 00623 int i; 00624 00625 s390_supply_regset (regset, regcache, regnum, regs, len); 00626 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw); 00627 if (ret != REG_VALID || (tdw >> 56) != 1) 00628 s390_supply_regset (regset, regcache, regnum, NULL, len); 00629 } 00630 00631 /* Collect register REGNUM from the register cache REGCACHE and store 00632 it in the buffer specified by REGS and LEN as described by the 00633 general-purpose register set REGSET. If REGNUM is -1, do this for 00634 all registers in REGSET. */ 00635 static void 00636 s390_collect_regset (const struct regset *regset, 00637 const struct regcache *regcache, 00638 int regnum, void *regs, size_t len) 00639 { 00640 const short *map; 00641 for (map = regset->descr; map[0] >= 0; map += 2) 00642 if (regnum == -1 || regnum == map[1]) 00643 regcache_raw_collect (regcache, map[1], (char *)regs + map[0]); 00644 } 00645 00646 static const struct regset s390_gregset = { 00647 s390_regmap_gregset, 00648 s390_supply_regset, 00649 s390_collect_regset 00650 }; 00651 00652 static const struct regset s390x_gregset = { 00653 s390x_regmap_gregset, 00654 s390_supply_regset, 00655 s390_collect_regset 00656 }; 00657 00658 static const struct regset s390_fpregset = { 00659 s390_regmap_fpregset, 00660 s390_supply_regset, 00661 s390_collect_regset 00662 }; 00663 00664 static const struct regset s390_upper_regset = { 00665 s390_regmap_upper, 00666 s390_supply_regset, 00667 s390_collect_regset 00668 }; 00669 00670 static const struct regset s390_last_break_regset = { 00671 s390_regmap_last_break, 00672 s390_supply_regset, 00673 s390_collect_regset 00674 }; 00675 00676 static const struct regset s390x_last_break_regset = { 00677 s390x_regmap_last_break, 00678 s390_supply_regset, 00679 s390_collect_regset 00680 }; 00681 00682 static const struct regset s390_system_call_regset = { 00683 s390_regmap_system_call, 00684 s390_supply_regset, 00685 s390_collect_regset 00686 }; 00687 00688 static const struct regset s390_tdb_regset = { 00689 s390_regmap_tdb, 00690 s390_supply_tdb_regset, 00691 s390_collect_regset 00692 }; 00693 00694 static struct core_regset_section s390_linux32_regset_sections[] = 00695 { 00696 { ".reg", s390_sizeof_gregset, "general-purpose" }, 00697 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00698 { NULL, 0} 00699 }; 00700 00701 static struct core_regset_section s390_linux32v1_regset_sections[] = 00702 { 00703 { ".reg", s390_sizeof_gregset, "general-purpose" }, 00704 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00705 { ".reg-s390-last-break", 8, "s390 last-break address" }, 00706 { NULL, 0} 00707 }; 00708 00709 static struct core_regset_section s390_linux32v2_regset_sections[] = 00710 { 00711 { ".reg", s390_sizeof_gregset, "general-purpose" }, 00712 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00713 { ".reg-s390-last-break", 8, "s390 last-break address" }, 00714 { ".reg-s390-system-call", 4, "s390 system-call" }, 00715 { NULL, 0} 00716 }; 00717 00718 static struct core_regset_section s390_linux64_regset_sections[] = 00719 { 00720 { ".reg", s390_sizeof_gregset, "general-purpose" }, 00721 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00722 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, 00723 { NULL, 0} 00724 }; 00725 00726 static struct core_regset_section s390_linux64v1_regset_sections[] = 00727 { 00728 { ".reg", s390_sizeof_gregset, "general-purpose" }, 00729 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00730 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, 00731 { ".reg-s390-last-break", 8, "s930 last-break address" }, 00732 { NULL, 0} 00733 }; 00734 00735 static struct core_regset_section s390_linux64v2_regset_sections[] = 00736 { 00737 { ".reg", s390_sizeof_gregset, "general-purpose" }, 00738 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00739 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, 00740 { ".reg-s390-last-break", 8, "s930 last-break address" }, 00741 { ".reg-s390-system-call", 4, "s390 system-call" }, 00742 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" }, 00743 { NULL, 0} 00744 }; 00745 00746 static struct core_regset_section s390x_linux64_regset_sections[] = 00747 { 00748 { ".reg", s390x_sizeof_gregset, "general-purpose" }, 00749 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00750 { NULL, 0} 00751 }; 00752 00753 static struct core_regset_section s390x_linux64v1_regset_sections[] = 00754 { 00755 { ".reg", s390x_sizeof_gregset, "general-purpose" }, 00756 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00757 { ".reg-s390-last-break", 8, "s930 last-break address" }, 00758 { NULL, 0} 00759 }; 00760 00761 static struct core_regset_section s390x_linux64v2_regset_sections[] = 00762 { 00763 { ".reg", s390x_sizeof_gregset, "general-purpose" }, 00764 { ".reg2", s390_sizeof_fpregset, "floating-point" }, 00765 { ".reg-s390-last-break", 8, "s930 last-break address" }, 00766 { ".reg-s390-system-call", 4, "s390 system-call" }, 00767 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" }, 00768 { NULL, 0} 00769 }; 00770 00771 00772 /* Return the appropriate register set for the core section identified 00773 by SECT_NAME and SECT_SIZE. */ 00774 static const struct regset * 00775 s390_regset_from_core_section (struct gdbarch *gdbarch, 00776 const char *sect_name, size_t sect_size) 00777 { 00778 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 00779 00780 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) 00781 return tdep->gregset; 00782 00783 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) 00784 return tdep->fpregset; 00785 00786 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4) 00787 return &s390_upper_regset; 00788 00789 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8) 00790 return (gdbarch_ptr_bit (gdbarch) == 32 00791 ? &s390_last_break_regset : &s390x_last_break_regset); 00792 00793 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4) 00794 return &s390_system_call_regset; 00795 00796 if (strcmp (sect_name, ".reg-s390-tdb") == 0 && sect_size >= 256) 00797 return &s390_tdb_regset; 00798 00799 return NULL; 00800 } 00801 00802 static const struct target_desc * 00803 s390_core_read_description (struct gdbarch *gdbarch, 00804 struct target_ops *target, bfd *abfd) 00805 { 00806 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs"); 00807 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break"); 00808 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call"); 00809 asection *section = bfd_get_section_by_name (abfd, ".reg"); 00810 CORE_ADDR hwcap = 0; 00811 00812 target_auxv_search (target, AT_HWCAP, &hwcap); 00813 if (!section) 00814 return NULL; 00815 00816 switch (bfd_section_size (abfd, section)) 00817 { 00818 case s390_sizeof_gregset: 00819 if (high_gprs) 00820 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 : 00821 v2? tdesc_s390_linux64v2 : 00822 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64); 00823 else 00824 return (v2? tdesc_s390_linux32v2 : 00825 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32); 00826 00827 case s390x_sizeof_gregset: 00828 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 : 00829 v2? tdesc_s390x_linux64v2 : 00830 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64); 00831 00832 default: 00833 return NULL; 00834 } 00835 } 00836 00837 00838 /* Decoding S/390 instructions. */ 00839 00840 /* Named opcode values for the S/390 instructions we recognize. Some 00841 instructions have their opcode split across two fields; those are the 00842 op1_* and op2_* enums. */ 00843 enum 00844 { 00845 op1_lhi = 0xa7, op2_lhi = 0x08, 00846 op1_lghi = 0xa7, op2_lghi = 0x09, 00847 op1_lgfi = 0xc0, op2_lgfi = 0x01, 00848 op_lr = 0x18, 00849 op_lgr = 0xb904, 00850 op_l = 0x58, 00851 op1_ly = 0xe3, op2_ly = 0x58, 00852 op1_lg = 0xe3, op2_lg = 0x04, 00853 op_lm = 0x98, 00854 op1_lmy = 0xeb, op2_lmy = 0x98, 00855 op1_lmg = 0xeb, op2_lmg = 0x04, 00856 op_st = 0x50, 00857 op1_sty = 0xe3, op2_sty = 0x50, 00858 op1_stg = 0xe3, op2_stg = 0x24, 00859 op_std = 0x60, 00860 op_stm = 0x90, 00861 op1_stmy = 0xeb, op2_stmy = 0x90, 00862 op1_stmg = 0xeb, op2_stmg = 0x24, 00863 op1_aghi = 0xa7, op2_aghi = 0x0b, 00864 op1_ahi = 0xa7, op2_ahi = 0x0a, 00865 op1_agfi = 0xc2, op2_agfi = 0x08, 00866 op1_afi = 0xc2, op2_afi = 0x09, 00867 op1_algfi= 0xc2, op2_algfi= 0x0a, 00868 op1_alfi = 0xc2, op2_alfi = 0x0b, 00869 op_ar = 0x1a, 00870 op_agr = 0xb908, 00871 op_a = 0x5a, 00872 op1_ay = 0xe3, op2_ay = 0x5a, 00873 op1_ag = 0xe3, op2_ag = 0x08, 00874 op1_slgfi= 0xc2, op2_slgfi= 0x04, 00875 op1_slfi = 0xc2, op2_slfi = 0x05, 00876 op_sr = 0x1b, 00877 op_sgr = 0xb909, 00878 op_s = 0x5b, 00879 op1_sy = 0xe3, op2_sy = 0x5b, 00880 op1_sg = 0xe3, op2_sg = 0x09, 00881 op_nr = 0x14, 00882 op_ngr = 0xb980, 00883 op_la = 0x41, 00884 op1_lay = 0xe3, op2_lay = 0x71, 00885 op1_larl = 0xc0, op2_larl = 0x00, 00886 op_basr = 0x0d, 00887 op_bas = 0x4d, 00888 op_bcr = 0x07, 00889 op_bc = 0x0d, 00890 op_bctr = 0x06, 00891 op_bctgr = 0xb946, 00892 op_bct = 0x46, 00893 op1_bctg = 0xe3, op2_bctg = 0x46, 00894 op_bxh = 0x86, 00895 op1_bxhg = 0xeb, op2_bxhg = 0x44, 00896 op_bxle = 0x87, 00897 op1_bxleg= 0xeb, op2_bxleg= 0x45, 00898 op1_bras = 0xa7, op2_bras = 0x05, 00899 op1_brasl= 0xc0, op2_brasl= 0x05, 00900 op1_brc = 0xa7, op2_brc = 0x04, 00901 op1_brcl = 0xc0, op2_brcl = 0x04, 00902 op1_brct = 0xa7, op2_brct = 0x06, 00903 op1_brctg= 0xa7, op2_brctg= 0x07, 00904 op_brxh = 0x84, 00905 op1_brxhg= 0xec, op2_brxhg= 0x44, 00906 op_brxle = 0x85, 00907 op1_brxlg= 0xec, op2_brxlg= 0x45, 00908 }; 00909 00910 00911 /* Read a single instruction from address AT. */ 00912 00913 #define S390_MAX_INSTR_SIZE 6 00914 static int 00915 s390_readinstruction (bfd_byte instr[], CORE_ADDR at) 00916 { 00917 static int s390_instrlen[] = { 2, 4, 4, 6 }; 00918 int instrlen; 00919 00920 if (target_read_memory (at, &instr[0], 2)) 00921 return -1; 00922 instrlen = s390_instrlen[instr[0] >> 6]; 00923 if (instrlen > 2) 00924 { 00925 if (target_read_memory (at + 2, &instr[2], instrlen - 2)) 00926 return -1; 00927 } 00928 return instrlen; 00929 } 00930 00931 00932 /* The functions below are for recognizing and decoding S/390 00933 instructions of various formats. Each of them checks whether INSN 00934 is an instruction of the given format, with the specified opcodes. 00935 If it is, it sets the remaining arguments to the values of the 00936 instruction's fields, and returns a non-zero value; otherwise, it 00937 returns zero. 00938 00939 These functions' arguments appear in the order they appear in the 00940 instruction, not in the machine-language form. So, opcodes always 00941 come first, even though they're sometimes scattered around the 00942 instructions. And displacements appear before base and extension 00943 registers, as they do in the assembly syntax, not at the end, as 00944 they do in the machine language. */ 00945 static int 00946 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) 00947 { 00948 if (insn[0] == op1 && (insn[1] & 0xf) == op2) 00949 { 00950 *r1 = (insn[1] >> 4) & 0xf; 00951 /* i2 is a 16-bit signed quantity. */ 00952 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; 00953 return 1; 00954 } 00955 else 00956 return 0; 00957 } 00958 00959 00960 static int 00961 is_ril (bfd_byte *insn, int op1, int op2, 00962 unsigned int *r1, int *i2) 00963 { 00964 if (insn[0] == op1 && (insn[1] & 0xf) == op2) 00965 { 00966 *r1 = (insn[1] >> 4) & 0xf; 00967 /* i2 is a signed quantity. If the host 'int' is 32 bits long, 00968 no sign extension is necessary, but we don't want to assume 00969 that. */ 00970 *i2 = (((insn[2] << 24) 00971 | (insn[3] << 16) 00972 | (insn[4] << 8) 00973 | (insn[5])) ^ 0x80000000) - 0x80000000; 00974 return 1; 00975 } 00976 else 00977 return 0; 00978 } 00979 00980 00981 static int 00982 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) 00983 { 00984 if (insn[0] == op) 00985 { 00986 *r1 = (insn[1] >> 4) & 0xf; 00987 *r2 = insn[1] & 0xf; 00988 return 1; 00989 } 00990 else 00991 return 0; 00992 } 00993 00994 00995 static int 00996 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) 00997 { 00998 if (((insn[0] << 8) | insn[1]) == op) 00999 { 01000 /* Yes, insn[3]. insn[2] is unused in RRE format. */ 01001 *r1 = (insn[3] >> 4) & 0xf; 01002 *r2 = insn[3] & 0xf; 01003 return 1; 01004 } 01005 else 01006 return 0; 01007 } 01008 01009 01010 static int 01011 is_rs (bfd_byte *insn, int op, 01012 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) 01013 { 01014 if (insn[0] == op) 01015 { 01016 *r1 = (insn[1] >> 4) & 0xf; 01017 *r3 = insn[1] & 0xf; 01018 *b2 = (insn[2] >> 4) & 0xf; 01019 *d2 = ((insn[2] & 0xf) << 8) | insn[3]; 01020 return 1; 01021 } 01022 else 01023 return 0; 01024 } 01025 01026 01027 static int 01028 is_rsy (bfd_byte *insn, int op1, int op2, 01029 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) 01030 { 01031 if (insn[0] == op1 01032 && insn[5] == op2) 01033 { 01034 *r1 = (insn[1] >> 4) & 0xf; 01035 *r3 = insn[1] & 0xf; 01036 *b2 = (insn[2] >> 4) & 0xf; 01037 /* The 'long displacement' is a 20-bit signed integer. */ 01038 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) 01039 ^ 0x80000) - 0x80000; 01040 return 1; 01041 } 01042 else 01043 return 0; 01044 } 01045 01046 01047 static int 01048 is_rsi (bfd_byte *insn, int op, 01049 unsigned int *r1, unsigned int *r3, int *i2) 01050 { 01051 if (insn[0] == op) 01052 { 01053 *r1 = (insn[1] >> 4) & 0xf; 01054 *r3 = insn[1] & 0xf; 01055 /* i2 is a 16-bit signed quantity. */ 01056 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; 01057 return 1; 01058 } 01059 else 01060 return 0; 01061 } 01062 01063 01064 static int 01065 is_rie (bfd_byte *insn, int op1, int op2, 01066 unsigned int *r1, unsigned int *r3, int *i2) 01067 { 01068 if (insn[0] == op1 01069 && insn[5] == op2) 01070 { 01071 *r1 = (insn[1] >> 4) & 0xf; 01072 *r3 = insn[1] & 0xf; 01073 /* i2 is a 16-bit signed quantity. */ 01074 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; 01075 return 1; 01076 } 01077 else 01078 return 0; 01079 } 01080 01081 01082 static int 01083 is_rx (bfd_byte *insn, int op, 01084 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) 01085 { 01086 if (insn[0] == op) 01087 { 01088 *r1 = (insn[1] >> 4) & 0xf; 01089 *x2 = insn[1] & 0xf; 01090 *b2 = (insn[2] >> 4) & 0xf; 01091 *d2 = ((insn[2] & 0xf) << 8) | insn[3]; 01092 return 1; 01093 } 01094 else 01095 return 0; 01096 } 01097 01098 01099 static int 01100 is_rxy (bfd_byte *insn, int op1, int op2, 01101 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) 01102 { 01103 if (insn[0] == op1 01104 && insn[5] == op2) 01105 { 01106 *r1 = (insn[1] >> 4) & 0xf; 01107 *x2 = insn[1] & 0xf; 01108 *b2 = (insn[2] >> 4) & 0xf; 01109 /* The 'long displacement' is a 20-bit signed integer. */ 01110 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) 01111 ^ 0x80000) - 0x80000; 01112 return 1; 01113 } 01114 else 01115 return 0; 01116 } 01117 01118 01119 /* Prologue analysis. */ 01120 01121 #define S390_NUM_GPRS 16 01122 #define S390_NUM_FPRS 16 01123 01124 struct s390_prologue_data { 01125 01126 /* The stack. */ 01127 struct pv_area *stack; 01128 01129 /* The size and byte-order of a GPR or FPR. */ 01130 int gpr_size; 01131 int fpr_size; 01132 enum bfd_endian byte_order; 01133 01134 /* The general-purpose registers. */ 01135 pv_t gpr[S390_NUM_GPRS]; 01136 01137 /* The floating-point registers. */ 01138 pv_t fpr[S390_NUM_FPRS]; 01139 01140 /* The offset relative to the CFA where the incoming GPR N was saved 01141 by the function prologue. 0 if not saved or unknown. */ 01142 int gpr_slot[S390_NUM_GPRS]; 01143 01144 /* Likewise for FPRs. */ 01145 int fpr_slot[S390_NUM_FPRS]; 01146 01147 /* Nonzero if the backchain was saved. This is assumed to be the 01148 case when the incoming SP is saved at the current SP location. */ 01149 int back_chain_saved_p; 01150 }; 01151 01152 /* Return the effective address for an X-style instruction, like: 01153 01154 L R1, D2(X2, B2) 01155 01156 Here, X2 and B2 are registers, and D2 is a signed 20-bit 01157 constant; the effective address is the sum of all three. If either 01158 X2 or B2 are zero, then it doesn't contribute to the sum --- this 01159 means that r0 can't be used as either X2 or B2. */ 01160 static pv_t 01161 s390_addr (struct s390_prologue_data *data, 01162 int d2, unsigned int x2, unsigned int b2) 01163 { 01164 pv_t result; 01165 01166 result = pv_constant (d2); 01167 if (x2) 01168 result = pv_add (result, data->gpr[x2]); 01169 if (b2) 01170 result = pv_add (result, data->gpr[b2]); 01171 01172 return result; 01173 } 01174 01175 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ 01176 static void 01177 s390_store (struct s390_prologue_data *data, 01178 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, 01179 pv_t value) 01180 { 01181 pv_t addr = s390_addr (data, d2, x2, b2); 01182 pv_t offset; 01183 01184 /* Check whether we are storing the backchain. */ 01185 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); 01186 01187 if (pv_is_constant (offset) && offset.k == 0) 01188 if (size == data->gpr_size 01189 && pv_is_register_k (value, S390_SP_REGNUM, 0)) 01190 { 01191 data->back_chain_saved_p = 1; 01192 return; 01193 } 01194 01195 01196 /* Check whether we are storing a register into the stack. */ 01197 if (!pv_area_store_would_trash (data->stack, addr)) 01198 pv_area_store (data->stack, addr, size, value); 01199 01200 01201 /* Note: If this is some store we cannot identify, you might think we 01202 should forget our cached values, as any of those might have been hit. 01203 01204 However, we make the assumption that the register save areas are only 01205 ever stored to once in any given function, and we do recognize these 01206 stores. Thus every store we cannot recognize does not hit our data. */ 01207 } 01208 01209 /* Do a SIZE-byte load from D2(X2,B2). */ 01210 static pv_t 01211 s390_load (struct s390_prologue_data *data, 01212 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) 01213 01214 { 01215 pv_t addr = s390_addr (data, d2, x2, b2); 01216 01217 /* If it's a load from an in-line constant pool, then we can 01218 simulate that, under the assumption that the code isn't 01219 going to change between the time the processor actually 01220 executed it creating the current frame, and the time when 01221 we're analyzing the code to unwind past that frame. */ 01222 if (pv_is_constant (addr)) 01223 { 01224 struct target_section *secp; 01225 secp = target_section_by_addr (¤t_target, addr.k); 01226 if (secp != NULL 01227 && (bfd_get_section_flags (secp->the_bfd_section->owner, 01228 secp->the_bfd_section) 01229 & SEC_READONLY)) 01230 return pv_constant (read_memory_integer (addr.k, size, 01231 data->byte_order)); 01232 } 01233 01234 /* Check whether we are accessing one of our save slots. */ 01235 return pv_area_fetch (data->stack, addr, size); 01236 } 01237 01238 /* Function for finding saved registers in a 'struct pv_area'; we pass 01239 this to pv_area_scan. 01240 01241 If VALUE is a saved register, ADDR says it was saved at a constant 01242 offset from the frame base, and SIZE indicates that the whole 01243 register was saved, record its offset in the reg_offset table in 01244 PROLOGUE_UNTYPED. */ 01245 static void 01246 s390_check_for_saved (void *data_untyped, pv_t addr, 01247 CORE_ADDR size, pv_t value) 01248 { 01249 struct s390_prologue_data *data = data_untyped; 01250 int i, offset; 01251 01252 if (!pv_is_register (addr, S390_SP_REGNUM)) 01253 return; 01254 01255 offset = 16 * data->gpr_size + 32 - addr.k; 01256 01257 /* If we are storing the original value of a register, we want to 01258 record the CFA offset. If the same register is stored multiple 01259 times, the stack slot with the highest address counts. */ 01260 01261 for (i = 0; i < S390_NUM_GPRS; i++) 01262 if (size == data->gpr_size 01263 && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) 01264 if (data->gpr_slot[i] == 0 01265 || data->gpr_slot[i] > offset) 01266 { 01267 data->gpr_slot[i] = offset; 01268 return; 01269 } 01270 01271 for (i = 0; i < S390_NUM_FPRS; i++) 01272 if (size == data->fpr_size 01273 && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) 01274 if (data->fpr_slot[i] == 0 01275 || data->fpr_slot[i] > offset) 01276 { 01277 data->fpr_slot[i] = offset; 01278 return; 01279 } 01280 } 01281 01282 /* Analyze the prologue of the function starting at START_PC, 01283 continuing at most until CURRENT_PC. Initialize DATA to 01284 hold all information we find out about the state of the registers 01285 and stack slots. Return the address of the instruction after 01286 the last one that changed the SP, FP, or back chain; or zero 01287 on error. */ 01288 static CORE_ADDR 01289 s390_analyze_prologue (struct gdbarch *gdbarch, 01290 CORE_ADDR start_pc, 01291 CORE_ADDR current_pc, 01292 struct s390_prologue_data *data) 01293 { 01294 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 01295 01296 /* Our return value: 01297 The address of the instruction after the last one that changed 01298 the SP, FP, or back chain; zero if we got an error trying to 01299 read memory. */ 01300 CORE_ADDR result = start_pc; 01301 01302 /* The current PC for our abstract interpretation. */ 01303 CORE_ADDR pc; 01304 01305 /* The address of the next instruction after that. */ 01306 CORE_ADDR next_pc; 01307 01308 /* Set up everything's initial value. */ 01309 { 01310 int i; 01311 01312 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); 01313 01314 /* For the purpose of prologue tracking, we consider the GPR size to 01315 be equal to the ABI word size, even if it is actually larger 01316 (i.e. when running a 32-bit binary under a 64-bit kernel). */ 01317 data->gpr_size = word_size; 01318 data->fpr_size = 8; 01319 data->byte_order = gdbarch_byte_order (gdbarch); 01320 01321 for (i = 0; i < S390_NUM_GPRS; i++) 01322 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); 01323 01324 for (i = 0; i < S390_NUM_FPRS; i++) 01325 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); 01326 01327 for (i = 0; i < S390_NUM_GPRS; i++) 01328 data->gpr_slot[i] = 0; 01329 01330 for (i = 0; i < S390_NUM_FPRS; i++) 01331 data->fpr_slot[i] = 0; 01332 01333 data->back_chain_saved_p = 0; 01334 } 01335 01336 /* Start interpreting instructions, until we hit the frame's 01337 current PC or the first branch instruction. */ 01338 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) 01339 { 01340 bfd_byte insn[S390_MAX_INSTR_SIZE]; 01341 int insn_len = s390_readinstruction (insn, pc); 01342 01343 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; 01344 bfd_byte *insn32 = word_size == 4 ? insn : dummy; 01345 bfd_byte *insn64 = word_size == 8 ? insn : dummy; 01346 01347 /* Fields for various kinds of instructions. */ 01348 unsigned int b2, r1, r2, x2, r3; 01349 int i2, d2; 01350 01351 /* The values of SP and FP before this instruction, 01352 for detecting instructions that change them. */ 01353 pv_t pre_insn_sp, pre_insn_fp; 01354 /* Likewise for the flag whether the back chain was saved. */ 01355 int pre_insn_back_chain_saved_p; 01356 01357 /* If we got an error trying to read the instruction, report it. */ 01358 if (insn_len < 0) 01359 { 01360 result = 0; 01361 break; 01362 } 01363 01364 next_pc = pc + insn_len; 01365 01366 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 01367 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; 01368 pre_insn_back_chain_saved_p = data->back_chain_saved_p; 01369 01370 01371 /* LHI r1, i2 --- load halfword immediate. */ 01372 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ 01373 /* LGFI r1, i2 --- load fullword immediate. */ 01374 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) 01375 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) 01376 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) 01377 data->gpr[r1] = pv_constant (i2); 01378 01379 /* LR r1, r2 --- load from register. */ 01380 /* LGR r1, r2 --- load from register (64-bit version). */ 01381 else if (is_rr (insn32, op_lr, &r1, &r2) 01382 || is_rre (insn64, op_lgr, &r1, &r2)) 01383 data->gpr[r1] = data->gpr[r2]; 01384 01385 /* L r1, d2(x2, b2) --- load. */ 01386 /* LY r1, d2(x2, b2) --- load (long-displacement version). */ 01387 /* LG r1, d2(x2, b2) --- load (64-bit version). */ 01388 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) 01389 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) 01390 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) 01391 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); 01392 01393 /* ST r1, d2(x2, b2) --- store. */ 01394 /* STY r1, d2(x2, b2) --- store (long-displacement version). */ 01395 /* STG r1, d2(x2, b2) --- store (64-bit version). */ 01396 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) 01397 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) 01398 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) 01399 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); 01400 01401 /* STD r1, d2(x2,b2) --- store floating-point register. */ 01402 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) 01403 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); 01404 01405 /* STM r1, r3, d2(b2) --- store multiple. */ 01406 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement 01407 version). */ 01408 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ 01409 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) 01410 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) 01411 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) 01412 { 01413 for (; r1 <= r3; r1++, d2 += data->gpr_size) 01414 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); 01415 } 01416 01417 /* AHI r1, i2 --- add halfword immediate. */ 01418 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ 01419 /* AFI r1, i2 --- add fullword immediate. */ 01420 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ 01421 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) 01422 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) 01423 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) 01424 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) 01425 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); 01426 01427 /* ALFI r1, i2 --- add logical immediate. */ 01428 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ 01429 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) 01430 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) 01431 data->gpr[r1] = pv_add_constant (data->gpr[r1], 01432 (CORE_ADDR)i2 & 0xffffffff); 01433 01434 /* AR r1, r2 -- add register. */ 01435 /* AGR r1, r2 -- add register (64-bit version). */ 01436 else if (is_rr (insn32, op_ar, &r1, &r2) 01437 || is_rre (insn64, op_agr, &r1, &r2)) 01438 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); 01439 01440 /* A r1, d2(x2, b2) -- add. */ 01441 /* AY r1, d2(x2, b2) -- add (long-displacement version). */ 01442 /* AG r1, d2(x2, b2) -- add (64-bit version). */ 01443 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) 01444 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) 01445 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) 01446 data->gpr[r1] = pv_add (data->gpr[r1], 01447 s390_load (data, d2, x2, b2, data->gpr_size)); 01448 01449 /* SLFI r1, i2 --- subtract logical immediate. */ 01450 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ 01451 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) 01452 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) 01453 data->gpr[r1] = pv_add_constant (data->gpr[r1], 01454 -((CORE_ADDR)i2 & 0xffffffff)); 01455 01456 /* SR r1, r2 -- subtract register. */ 01457 /* SGR r1, r2 -- subtract register (64-bit version). */ 01458 else if (is_rr (insn32, op_sr, &r1, &r2) 01459 || is_rre (insn64, op_sgr, &r1, &r2)) 01460 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); 01461 01462 /* S r1, d2(x2, b2) -- subtract. */ 01463 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ 01464 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ 01465 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) 01466 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) 01467 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) 01468 data->gpr[r1] = pv_subtract (data->gpr[r1], 01469 s390_load (data, d2, x2, b2, data->gpr_size)); 01470 01471 /* LA r1, d2(x2, b2) --- load address. */ 01472 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ 01473 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) 01474 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) 01475 data->gpr[r1] = s390_addr (data, d2, x2, b2); 01476 01477 /* LARL r1, i2 --- load address relative long. */ 01478 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) 01479 data->gpr[r1] = pv_constant (pc + i2 * 2); 01480 01481 /* BASR r1, 0 --- branch and save. 01482 Since r2 is zero, this saves the PC in r1, but doesn't branch. */ 01483 else if (is_rr (insn, op_basr, &r1, &r2) 01484 && r2 == 0) 01485 data->gpr[r1] = pv_constant (next_pc); 01486 01487 /* BRAS r1, i2 --- branch relative and save. */ 01488 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) 01489 { 01490 data->gpr[r1] = pv_constant (next_pc); 01491 next_pc = pc + i2 * 2; 01492 01493 /* We'd better not interpret any backward branches. We'll 01494 never terminate. */ 01495 if (next_pc <= pc) 01496 break; 01497 } 01498 01499 /* Terminate search when hitting any other branch instruction. */ 01500 else if (is_rr (insn, op_basr, &r1, &r2) 01501 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) 01502 || is_rr (insn, op_bcr, &r1, &r2) 01503 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) 01504 || is_ri (insn, op1_brc, op2_brc, &r1, &i2) 01505 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) 01506 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) 01507 break; 01508 01509 else 01510 { 01511 /* An instruction we don't know how to simulate. The only 01512 safe thing to do would be to set every value we're tracking 01513 to 'unknown'. Instead, we'll be optimistic: we assume that 01514 we *can* interpret every instruction that the compiler uses 01515 to manipulate any of the data we're interested in here -- 01516 then we can just ignore anything else. */ 01517 } 01518 01519 /* Record the address after the last instruction that changed 01520 the FP, SP, or backlink. Ignore instructions that changed 01521 them back to their original values --- those are probably 01522 restore instructions. (The back chain is never restored, 01523 just popped.) */ 01524 { 01525 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 01526 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; 01527 01528 if ((! pv_is_identical (pre_insn_sp, sp) 01529 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) 01530 && sp.kind != pvk_unknown) 01531 || (! pv_is_identical (pre_insn_fp, fp) 01532 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) 01533 && fp.kind != pvk_unknown) 01534 || pre_insn_back_chain_saved_p != data->back_chain_saved_p) 01535 result = next_pc; 01536 } 01537 } 01538 01539 /* Record where all the registers were saved. */ 01540 pv_area_scan (data->stack, s390_check_for_saved, data); 01541 01542 free_pv_area (data->stack); 01543 data->stack = NULL; 01544 01545 return result; 01546 } 01547 01548 /* Advance PC across any function entry prologue instructions to reach 01549 some "real" code. */ 01550 static CORE_ADDR 01551 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 01552 { 01553 struct s390_prologue_data data; 01554 CORE_ADDR skip_pc; 01555 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); 01556 return skip_pc ? skip_pc : pc; 01557 } 01558 01559 /* Return true if we are in the functin's epilogue, i.e. after the 01560 instruction that destroyed the function's stack frame. */ 01561 static int 01562 s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) 01563 { 01564 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 01565 01566 /* In frameless functions, there's not frame to destroy and thus 01567 we don't care about the epilogue. 01568 01569 In functions with frame, the epilogue sequence is a pair of 01570 a LM-type instruction that restores (amongst others) the 01571 return register %r14 and the stack pointer %r15, followed 01572 by a branch 'br %r14' --or equivalent-- that effects the 01573 actual return. 01574 01575 In that situation, this function needs to return 'true' in 01576 exactly one case: when pc points to that branch instruction. 01577 01578 Thus we try to disassemble the one instructions immediately 01579 preceding pc and check whether it is an LM-type instruction 01580 modifying the stack pointer. 01581 01582 Note that disassembling backwards is not reliable, so there 01583 is a slight chance of false positives here ... */ 01584 01585 bfd_byte insn[6]; 01586 unsigned int r1, r3, b2; 01587 int d2; 01588 01589 if (word_size == 4 01590 && !target_read_memory (pc - 4, insn, 4) 01591 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) 01592 && r3 == S390_SP_REGNUM - S390_R0_REGNUM) 01593 return 1; 01594 01595 if (word_size == 4 01596 && !target_read_memory (pc - 6, insn, 6) 01597 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) 01598 && r3 == S390_SP_REGNUM - S390_R0_REGNUM) 01599 return 1; 01600 01601 if (word_size == 8 01602 && !target_read_memory (pc - 6, insn, 6) 01603 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) 01604 && r3 == S390_SP_REGNUM - S390_R0_REGNUM) 01605 return 1; 01606 01607 return 0; 01608 } 01609 01610 /* Displaced stepping. */ 01611 01612 /* Fix up the state of registers and memory after having single-stepped 01613 a displaced instruction. */ 01614 static void 01615 s390_displaced_step_fixup (struct gdbarch *gdbarch, 01616 struct displaced_step_closure *closure, 01617 CORE_ADDR from, CORE_ADDR to, 01618 struct regcache *regs) 01619 { 01620 /* Since we use simple_displaced_step_copy_insn, our closure is a 01621 copy of the instruction. */ 01622 gdb_byte *insn = (gdb_byte *) closure; 01623 static int s390_instrlen[] = { 2, 4, 4, 6 }; 01624 int insnlen = s390_instrlen[insn[0] >> 6]; 01625 01626 /* Fields for various kinds of instructions. */ 01627 unsigned int b2, r1, r2, x2, r3; 01628 int i2, d2; 01629 01630 /* Get current PC and addressing mode bit. */ 01631 CORE_ADDR pc = regcache_read_pc (regs); 01632 ULONGEST amode = 0; 01633 01634 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) 01635 { 01636 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); 01637 amode &= 0x80000000; 01638 } 01639 01640 if (debug_displaced) 01641 fprintf_unfiltered (gdb_stdlog, 01642 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n", 01643 paddress (gdbarch, from), paddress (gdbarch, to), 01644 paddress (gdbarch, pc), insnlen, (int) amode); 01645 01646 /* Handle absolute branch and save instructions. */ 01647 if (is_rr (insn, op_basr, &r1, &r2) 01648 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) 01649 { 01650 /* Recompute saved return address in R1. */ 01651 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, 01652 amode | (from + insnlen)); 01653 } 01654 01655 /* Handle absolute branch instructions. */ 01656 else if (is_rr (insn, op_bcr, &r1, &r2) 01657 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) 01658 || is_rr (insn, op_bctr, &r1, &r2) 01659 || is_rre (insn, op_bctgr, &r1, &r2) 01660 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) 01661 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) 01662 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) 01663 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) 01664 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) 01665 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) 01666 { 01667 /* Update PC iff branch was *not* taken. */ 01668 if (pc == to + insnlen) 01669 regcache_write_pc (regs, from + insnlen); 01670 } 01671 01672 /* Handle PC-relative branch and save instructions. */ 01673 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) 01674 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) 01675 { 01676 /* Update PC. */ 01677 regcache_write_pc (regs, pc - to + from); 01678 /* Recompute saved return address in R1. */ 01679 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, 01680 amode | (from + insnlen)); 01681 } 01682 01683 /* Handle PC-relative branch instructions. */ 01684 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2) 01685 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) 01686 || is_ri (insn, op1_brct, op2_brct, &r1, &i2) 01687 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2) 01688 || is_rsi (insn, op_brxh, &r1, &r3, &i2) 01689 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2) 01690 || is_rsi (insn, op_brxle, &r1, &r3, &i2) 01691 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2)) 01692 { 01693 /* Update PC. */ 01694 regcache_write_pc (regs, pc - to + from); 01695 } 01696 01697 /* Handle LOAD ADDRESS RELATIVE LONG. */ 01698 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) 01699 { 01700 /* Update PC. */ 01701 regcache_write_pc (regs, from + insnlen); 01702 /* Recompute output address in R1. */ 01703 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, 01704 amode | (from + i2 * 2)); 01705 } 01706 01707 /* If we executed a breakpoint instruction, point PC right back at it. */ 01708 else if (insn[0] == 0x0 && insn[1] == 0x1) 01709 regcache_write_pc (regs, from); 01710 01711 /* For any other insn, PC points right after the original instruction. */ 01712 else 01713 regcache_write_pc (regs, from + insnlen); 01714 01715 if (debug_displaced) 01716 fprintf_unfiltered (gdb_stdlog, 01717 "displaced: (s390) pc is now %s\n", 01718 paddress (gdbarch, regcache_read_pc (regs))); 01719 } 01720 01721 01722 /* Helper routine to unwind pseudo registers. */ 01723 01724 static struct value * 01725 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum) 01726 { 01727 struct gdbarch *gdbarch = get_frame_arch (this_frame); 01728 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 01729 struct type *type = register_type (gdbarch, regnum); 01730 01731 /* Unwind PC via PSW address. */ 01732 if (regnum == tdep->pc_regnum) 01733 { 01734 struct value *val; 01735 01736 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM); 01737 if (!value_optimized_out (val)) 01738 { 01739 LONGEST pswa = value_as_long (val); 01740 01741 if (TYPE_LENGTH (type) == 4) 01742 return value_from_pointer (type, pswa & 0x7fffffff); 01743 else 01744 return value_from_pointer (type, pswa); 01745 } 01746 } 01747 01748 /* Unwind CC via PSW mask. */ 01749 if (regnum == tdep->cc_regnum) 01750 { 01751 struct value *val; 01752 01753 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM); 01754 if (!value_optimized_out (val)) 01755 { 01756 LONGEST pswm = value_as_long (val); 01757 01758 if (TYPE_LENGTH (type) == 4) 01759 return value_from_longest (type, (pswm >> 12) & 3); 01760 else 01761 return value_from_longest (type, (pswm >> 44) & 3); 01762 } 01763 } 01764 01765 /* Unwind full GPRs to show at least the lower halves (as the 01766 upper halves are undefined). */ 01767 if (regnum_is_gpr_full (tdep, regnum)) 01768 { 01769 int reg = regnum - tdep->gpr_full_regnum; 01770 struct value *val; 01771 01772 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); 01773 if (!value_optimized_out (val)) 01774 return value_cast (type, val); 01775 } 01776 01777 return allocate_optimized_out_value (type); 01778 } 01779 01780 static struct value * 01781 s390_trad_frame_prev_register (struct frame_info *this_frame, 01782 struct trad_frame_saved_reg saved_regs[], 01783 int regnum) 01784 { 01785 if (regnum < S390_NUM_REGS) 01786 return trad_frame_get_prev_register (this_frame, saved_regs, regnum); 01787 else 01788 return s390_unwind_pseudo_register (this_frame, regnum); 01789 } 01790 01791 01792 /* Normal stack frames. */ 01793 01794 struct s390_unwind_cache { 01795 01796 CORE_ADDR func; 01797 CORE_ADDR frame_base; 01798 CORE_ADDR local_base; 01799 01800 struct trad_frame_saved_reg *saved_regs; 01801 }; 01802 01803 static int 01804 s390_prologue_frame_unwind_cache (struct frame_info *this_frame, 01805 struct s390_unwind_cache *info) 01806 { 01807 struct gdbarch *gdbarch = get_frame_arch (this_frame); 01808 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 01809 struct s390_prologue_data data; 01810 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; 01811 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 01812 int i; 01813 CORE_ADDR cfa; 01814 CORE_ADDR func; 01815 CORE_ADDR result; 01816 ULONGEST reg; 01817 CORE_ADDR prev_sp; 01818 int frame_pointer; 01819 int size; 01820 struct frame_info *next_frame; 01821 01822 /* Try to find the function start address. If we can't find it, we don't 01823 bother searching for it -- with modern compilers this would be mostly 01824 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data 01825 or else a valid backchain ... */ 01826 func = get_frame_func (this_frame); 01827 if (!func) 01828 return 0; 01829 01830 /* Try to analyze the prologue. */ 01831 result = s390_analyze_prologue (gdbarch, func, 01832 get_frame_pc (this_frame), &data); 01833 if (!result) 01834 return 0; 01835 01836 /* If this was successful, we should have found the instruction that 01837 sets the stack pointer register to the previous value of the stack 01838 pointer minus the frame size. */ 01839 if (!pv_is_register (*sp, S390_SP_REGNUM)) 01840 return 0; 01841 01842 /* A frame size of zero at this point can mean either a real 01843 frameless function, or else a failure to find the prologue. 01844 Perform some sanity checks to verify we really have a 01845 frameless function. */ 01846 if (sp->k == 0) 01847 { 01848 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame 01849 size zero. This is only possible if the next frame is a sentinel 01850 frame, a dummy frame, or a signal trampoline frame. */ 01851 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be 01852 needed, instead the code should simpliy rely on its 01853 analysis. */ 01854 next_frame = get_next_frame (this_frame); 01855 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) 01856 next_frame = get_next_frame (next_frame); 01857 if (next_frame 01858 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) 01859 return 0; 01860 01861 /* If we really have a frameless function, %r14 must be valid 01862 -- in particular, it must point to a different function. */ 01863 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); 01864 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; 01865 if (get_pc_function_start (reg) == func) 01866 { 01867 /* However, there is one case where it *is* valid for %r14 01868 to point to the same function -- if this is a recursive 01869 call, and we have stopped in the prologue *before* the 01870 stack frame was allocated. 01871 01872 Recognize this case by looking ahead a bit ... */ 01873 01874 struct s390_prologue_data data2; 01875 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 01876 01877 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) 01878 && pv_is_register (*sp, S390_SP_REGNUM) 01879 && sp->k != 0)) 01880 return 0; 01881 } 01882 } 01883 01884 01885 /* OK, we've found valid prologue data. */ 01886 size = -sp->k; 01887 01888 /* If the frame pointer originally also holds the same value 01889 as the stack pointer, we're probably using it. If it holds 01890 some other value -- even a constant offset -- it is most 01891 likely used as temp register. */ 01892 if (pv_is_identical (*sp, *fp)) 01893 frame_pointer = S390_FRAME_REGNUM; 01894 else 01895 frame_pointer = S390_SP_REGNUM; 01896 01897 /* If we've detected a function with stack frame, we'll still have to 01898 treat it as frameless if we're currently within the function epilog 01899 code at a point where the frame pointer has already been restored. 01900 This can only happen in an innermost frame. */ 01901 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, 01902 instead the code should simpliy rely on its analysis. */ 01903 next_frame = get_next_frame (this_frame); 01904 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) 01905 next_frame = get_next_frame (next_frame); 01906 if (size > 0 01907 && (next_frame == NULL 01908 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) 01909 { 01910 /* See the comment in s390_in_function_epilogue_p on why this is 01911 not completely reliable ... */ 01912 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) 01913 { 01914 memset (&data, 0, sizeof (data)); 01915 size = 0; 01916 frame_pointer = S390_SP_REGNUM; 01917 } 01918 } 01919 01920 /* Once we know the frame register and the frame size, we can unwind 01921 the current value of the frame register from the next frame, and 01922 add back the frame size to arrive that the previous frame's 01923 stack pointer value. */ 01924 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; 01925 cfa = prev_sp + 16*word_size + 32; 01926 01927 /* Set up ABI call-saved/call-clobbered registers. */ 01928 for (i = 0; i < S390_NUM_REGS; i++) 01929 if (!s390_register_call_saved (gdbarch, i)) 01930 trad_frame_set_unknown (info->saved_regs, i); 01931 01932 /* CC is always call-clobbered. */ 01933 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); 01934 01935 /* Record the addresses of all register spill slots the prologue parser 01936 has recognized. Consider only registers defined as call-saved by the 01937 ABI; for call-clobbered registers the parser may have recognized 01938 spurious stores. */ 01939 01940 for (i = 0; i < 16; i++) 01941 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) 01942 && data.gpr_slot[i] != 0) 01943 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; 01944 01945 for (i = 0; i < 16; i++) 01946 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) 01947 && data.fpr_slot[i] != 0) 01948 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; 01949 01950 /* Function return will set PC to %r14. */ 01951 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; 01952 01953 /* In frameless functions, we unwind simply by moving the return 01954 address to the PC. However, if we actually stored to the 01955 save area, use that -- we might only think the function frameless 01956 because we're in the middle of the prologue ... */ 01957 if (size == 0 01958 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) 01959 { 01960 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; 01961 } 01962 01963 /* Another sanity check: unless this is a frameless function, 01964 we should have found spill slots for SP and PC. 01965 If not, we cannot unwind further -- this happens e.g. in 01966 libc's thread_start routine. */ 01967 if (size > 0) 01968 { 01969 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) 01970 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) 01971 prev_sp = -1; 01972 } 01973 01974 /* We use the current value of the frame register as local_base, 01975 and the top of the register save area as frame_base. */ 01976 if (prev_sp != -1) 01977 { 01978 info->frame_base = prev_sp + 16*word_size + 32; 01979 info->local_base = prev_sp - size; 01980 } 01981 01982 info->func = func; 01983 return 1; 01984 } 01985 01986 static void 01987 s390_backchain_frame_unwind_cache (struct frame_info *this_frame, 01988 struct s390_unwind_cache *info) 01989 { 01990 struct gdbarch *gdbarch = get_frame_arch (this_frame); 01991 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 01992 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 01993 CORE_ADDR backchain; 01994 ULONGEST reg; 01995 LONGEST sp; 01996 int i; 01997 01998 /* Set up ABI call-saved/call-clobbered registers. */ 01999 for (i = 0; i < S390_NUM_REGS; i++) 02000 if (!s390_register_call_saved (gdbarch, i)) 02001 trad_frame_set_unknown (info->saved_regs, i); 02002 02003 /* CC is always call-clobbered. */ 02004 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); 02005 02006 /* Get the backchain. */ 02007 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); 02008 backchain = read_memory_unsigned_integer (reg, word_size, byte_order); 02009 02010 /* A zero backchain terminates the frame chain. As additional 02011 sanity check, let's verify that the spill slot for SP in the 02012 save area pointed to by the backchain in fact links back to 02013 the save area. */ 02014 if (backchain != 0 02015 && safe_read_memory_integer (backchain + 15*word_size, 02016 word_size, byte_order, &sp) 02017 && (CORE_ADDR)sp == backchain) 02018 { 02019 /* We don't know which registers were saved, but it will have 02020 to be at least %r14 and %r15. This will allow us to continue 02021 unwinding, but other prev-frame registers may be incorrect ... */ 02022 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; 02023 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; 02024 02025 /* Function return will set PC to %r14. */ 02026 info->saved_regs[S390_PSWA_REGNUM] 02027 = info->saved_regs[S390_RETADDR_REGNUM]; 02028 02029 /* We use the current value of the frame register as local_base, 02030 and the top of the register save area as frame_base. */ 02031 info->frame_base = backchain + 16*word_size + 32; 02032 info->local_base = reg; 02033 } 02034 02035 info->func = get_frame_pc (this_frame); 02036 } 02037 02038 static struct s390_unwind_cache * 02039 s390_frame_unwind_cache (struct frame_info *this_frame, 02040 void **this_prologue_cache) 02041 { 02042 struct s390_unwind_cache *info; 02043 if (*this_prologue_cache) 02044 return *this_prologue_cache; 02045 02046 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); 02047 *this_prologue_cache = info; 02048 info->saved_regs = trad_frame_alloc_saved_regs (this_frame); 02049 info->func = -1; 02050 info->frame_base = -1; 02051 info->local_base = -1; 02052 02053 /* Try to use prologue analysis to fill the unwind cache. 02054 If this fails, fall back to reading the stack backchain. */ 02055 if (!s390_prologue_frame_unwind_cache (this_frame, info)) 02056 s390_backchain_frame_unwind_cache (this_frame, info); 02057 02058 return info; 02059 } 02060 02061 static void 02062 s390_frame_this_id (struct frame_info *this_frame, 02063 void **this_prologue_cache, 02064 struct frame_id *this_id) 02065 { 02066 struct s390_unwind_cache *info 02067 = s390_frame_unwind_cache (this_frame, this_prologue_cache); 02068 02069 if (info->frame_base == -1) 02070 return; 02071 02072 *this_id = frame_id_build (info->frame_base, info->func); 02073 } 02074 02075 static struct value * 02076 s390_frame_prev_register (struct frame_info *this_frame, 02077 void **this_prologue_cache, int regnum) 02078 { 02079 struct gdbarch *gdbarch = get_frame_arch (this_frame); 02080 struct s390_unwind_cache *info 02081 = s390_frame_unwind_cache (this_frame, this_prologue_cache); 02082 02083 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); 02084 } 02085 02086 static const struct frame_unwind s390_frame_unwind = { 02087 NORMAL_FRAME, 02088 default_frame_unwind_stop_reason, 02089 s390_frame_this_id, 02090 s390_frame_prev_register, 02091 NULL, 02092 default_frame_sniffer 02093 }; 02094 02095 02096 /* Code stubs and their stack frames. For things like PLTs and NULL 02097 function calls (where there is no true frame and the return address 02098 is in the RETADDR register). */ 02099 02100 struct s390_stub_unwind_cache 02101 { 02102 CORE_ADDR frame_base; 02103 struct trad_frame_saved_reg *saved_regs; 02104 }; 02105 02106 static struct s390_stub_unwind_cache * 02107 s390_stub_frame_unwind_cache (struct frame_info *this_frame, 02108 void **this_prologue_cache) 02109 { 02110 struct gdbarch *gdbarch = get_frame_arch (this_frame); 02111 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 02112 struct s390_stub_unwind_cache *info; 02113 ULONGEST reg; 02114 02115 if (*this_prologue_cache) 02116 return *this_prologue_cache; 02117 02118 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); 02119 *this_prologue_cache = info; 02120 info->saved_regs = trad_frame_alloc_saved_regs (this_frame); 02121 02122 /* The return address is in register %r14. */ 02123 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; 02124 02125 /* Retrieve stack pointer and determine our frame base. */ 02126 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); 02127 info->frame_base = reg + 16*word_size + 32; 02128 02129 return info; 02130 } 02131 02132 static void 02133 s390_stub_frame_this_id (struct frame_info *this_frame, 02134 void **this_prologue_cache, 02135 struct frame_id *this_id) 02136 { 02137 struct s390_stub_unwind_cache *info 02138 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); 02139 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); 02140 } 02141 02142 static struct value * 02143 s390_stub_frame_prev_register (struct frame_info *this_frame, 02144 void **this_prologue_cache, int regnum) 02145 { 02146 struct s390_stub_unwind_cache *info 02147 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); 02148 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); 02149 } 02150 02151 static int 02152 s390_stub_frame_sniffer (const struct frame_unwind *self, 02153 struct frame_info *this_frame, 02154 void **this_prologue_cache) 02155 { 02156 CORE_ADDR addr_in_block; 02157 bfd_byte insn[S390_MAX_INSTR_SIZE]; 02158 02159 /* If the current PC points to non-readable memory, we assume we 02160 have trapped due to an invalid function pointer call. We handle 02161 the non-existing current function like a PLT stub. */ 02162 addr_in_block = get_frame_address_in_block (this_frame); 02163 if (in_plt_section (addr_in_block) 02164 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) 02165 return 1; 02166 return 0; 02167 } 02168 02169 static const struct frame_unwind s390_stub_frame_unwind = { 02170 NORMAL_FRAME, 02171 default_frame_unwind_stop_reason, 02172 s390_stub_frame_this_id, 02173 s390_stub_frame_prev_register, 02174 NULL, 02175 s390_stub_frame_sniffer 02176 }; 02177 02178 02179 /* Signal trampoline stack frames. */ 02180 02181 struct s390_sigtramp_unwind_cache { 02182 CORE_ADDR frame_base; 02183 struct trad_frame_saved_reg *saved_regs; 02184 }; 02185 02186 static struct s390_sigtramp_unwind_cache * 02187 s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, 02188 void **this_prologue_cache) 02189 { 02190 struct gdbarch *gdbarch = get_frame_arch (this_frame); 02191 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 02192 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 02193 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 02194 struct s390_sigtramp_unwind_cache *info; 02195 ULONGEST this_sp, prev_sp; 02196 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off; 02197 int i; 02198 02199 if (*this_prologue_cache) 02200 return *this_prologue_cache; 02201 02202 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); 02203 *this_prologue_cache = info; 02204 info->saved_regs = trad_frame_alloc_saved_regs (this_frame); 02205 02206 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); 02207 next_ra = get_frame_pc (this_frame); 02208 next_cfa = this_sp + 16*word_size + 32; 02209 02210 /* New-style RT frame: 02211 retcode + alignment (8 bytes) 02212 siginfo (128 bytes) 02213 ucontext (contains sigregs at offset 5 words). */ 02214 if (next_ra == next_cfa) 02215 { 02216 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); 02217 /* sigregs are followed by uc_sigmask (8 bytes), then by the 02218 upper GPR halves if present. */ 02219 sigreg_high_off = 8; 02220 } 02221 02222 /* Old-style RT frame and all non-RT frames: 02223 old signal mask (8 bytes) 02224 pointer to sigregs. */ 02225 else 02226 { 02227 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, 02228 word_size, byte_order); 02229 /* sigregs are followed by signo (4 bytes), then by the 02230 upper GPR halves if present. */ 02231 sigreg_high_off = 4; 02232 } 02233 02234 /* The sigregs structure looks like this: 02235 long psw_mask; 02236 long psw_addr; 02237 long gprs[16]; 02238 int acrs[16]; 02239 int fpc; 02240 int __pad; 02241 double fprs[16]; */ 02242 02243 /* PSW mask and address. */ 02244 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr; 02245 sigreg_ptr += word_size; 02246 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr; 02247 sigreg_ptr += word_size; 02248 02249 /* Then the GPRs. */ 02250 for (i = 0; i < 16; i++) 02251 { 02252 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; 02253 sigreg_ptr += word_size; 02254 } 02255 02256 /* Then the ACRs. */ 02257 for (i = 0; i < 16; i++) 02258 { 02259 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; 02260 sigreg_ptr += 4; 02261 } 02262 02263 /* The floating-point control word. */ 02264 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; 02265 sigreg_ptr += 8; 02266 02267 /* And finally the FPRs. */ 02268 for (i = 0; i < 16; i++) 02269 { 02270 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; 02271 sigreg_ptr += 8; 02272 } 02273 02274 /* If we have them, the GPR upper halves are appended at the end. */ 02275 sigreg_ptr += sigreg_high_off; 02276 if (tdep->gpr_full_regnum != -1) 02277 for (i = 0; i < 16; i++) 02278 { 02279 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr; 02280 sigreg_ptr += 4; 02281 } 02282 02283 /* Restore the previous frame's SP. */ 02284 prev_sp = read_memory_unsigned_integer ( 02285 info->saved_regs[S390_SP_REGNUM].addr, 02286 word_size, byte_order); 02287 02288 /* Determine our frame base. */ 02289 info->frame_base = prev_sp + 16*word_size + 32; 02290 02291 return info; 02292 } 02293 02294 static void 02295 s390_sigtramp_frame_this_id (struct frame_info *this_frame, 02296 void **this_prologue_cache, 02297 struct frame_id *this_id) 02298 { 02299 struct s390_sigtramp_unwind_cache *info 02300 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); 02301 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); 02302 } 02303 02304 static struct value * 02305 s390_sigtramp_frame_prev_register (struct frame_info *this_frame, 02306 void **this_prologue_cache, int regnum) 02307 { 02308 struct s390_sigtramp_unwind_cache *info 02309 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); 02310 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); 02311 } 02312 02313 static int 02314 s390_sigtramp_frame_sniffer (const struct frame_unwind *self, 02315 struct frame_info *this_frame, 02316 void **this_prologue_cache) 02317 { 02318 CORE_ADDR pc = get_frame_pc (this_frame); 02319 bfd_byte sigreturn[2]; 02320 02321 if (target_read_memory (pc, sigreturn, 2)) 02322 return 0; 02323 02324 if (sigreturn[0] != 0x0a /* svc */) 02325 return 0; 02326 02327 if (sigreturn[1] != 119 /* sigreturn */ 02328 && sigreturn[1] != 173 /* rt_sigreturn */) 02329 return 0; 02330 02331 return 1; 02332 } 02333 02334 static const struct frame_unwind s390_sigtramp_frame_unwind = { 02335 SIGTRAMP_FRAME, 02336 default_frame_unwind_stop_reason, 02337 s390_sigtramp_frame_this_id, 02338 s390_sigtramp_frame_prev_register, 02339 NULL, 02340 s390_sigtramp_frame_sniffer 02341 }; 02342 02343 02344 /* Frame base handling. */ 02345 02346 static CORE_ADDR 02347 s390_frame_base_address (struct frame_info *this_frame, void **this_cache) 02348 { 02349 struct s390_unwind_cache *info 02350 = s390_frame_unwind_cache (this_frame, this_cache); 02351 return info->frame_base; 02352 } 02353 02354 static CORE_ADDR 02355 s390_local_base_address (struct frame_info *this_frame, void **this_cache) 02356 { 02357 struct s390_unwind_cache *info 02358 = s390_frame_unwind_cache (this_frame, this_cache); 02359 return info->local_base; 02360 } 02361 02362 static const struct frame_base s390_frame_base = { 02363 &s390_frame_unwind, 02364 s390_frame_base_address, 02365 s390_local_base_address, 02366 s390_local_base_address 02367 }; 02368 02369 static CORE_ADDR 02370 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 02371 { 02372 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 02373 ULONGEST pc; 02374 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); 02375 return gdbarch_addr_bits_remove (gdbarch, pc); 02376 } 02377 02378 static CORE_ADDR 02379 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 02380 { 02381 ULONGEST sp; 02382 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); 02383 return gdbarch_addr_bits_remove (gdbarch, sp); 02384 } 02385 02386 02387 /* DWARF-2 frame support. */ 02388 02389 static struct value * 02390 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, 02391 int regnum) 02392 { 02393 return s390_unwind_pseudo_register (this_frame, regnum); 02394 } 02395 02396 static void 02397 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, 02398 struct dwarf2_frame_state_reg *reg, 02399 struct frame_info *this_frame) 02400 { 02401 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 02402 02403 /* The condition code (and thus PSW mask) is call-clobbered. */ 02404 if (regnum == S390_PSWM_REGNUM) 02405 reg->how = DWARF2_FRAME_REG_UNDEFINED; 02406 02407 /* The PSW address unwinds to the return address. */ 02408 else if (regnum == S390_PSWA_REGNUM) 02409 reg->how = DWARF2_FRAME_REG_RA; 02410 02411 /* Fixed registers are call-saved or call-clobbered 02412 depending on the ABI in use. */ 02413 else if (regnum < S390_NUM_REGS) 02414 { 02415 if (s390_register_call_saved (gdbarch, regnum)) 02416 reg->how = DWARF2_FRAME_REG_SAME_VALUE; 02417 else 02418 reg->how = DWARF2_FRAME_REG_UNDEFINED; 02419 } 02420 02421 /* We install a special function to unwind pseudos. */ 02422 else 02423 { 02424 reg->how = DWARF2_FRAME_REG_FN; 02425 reg->loc.fn = s390_dwarf2_prev_register; 02426 } 02427 } 02428 02429 02430 /* Dummy function calls. */ 02431 02432 /* Return non-zero if TYPE is an integer-like type, zero otherwise. 02433 "Integer-like" types are those that should be passed the way 02434 integers are: integers, enums, ranges, characters, and booleans. */ 02435 static int 02436 is_integer_like (struct type *type) 02437 { 02438 enum type_code code = TYPE_CODE (type); 02439 02440 return (code == TYPE_CODE_INT 02441 || code == TYPE_CODE_ENUM 02442 || code == TYPE_CODE_RANGE 02443 || code == TYPE_CODE_CHAR 02444 || code == TYPE_CODE_BOOL); 02445 } 02446 02447 /* Return non-zero if TYPE is a pointer-like type, zero otherwise. 02448 "Pointer-like" types are those that should be passed the way 02449 pointers are: pointers and references. */ 02450 static int 02451 is_pointer_like (struct type *type) 02452 { 02453 enum type_code code = TYPE_CODE (type); 02454 02455 return (code == TYPE_CODE_PTR 02456 || code == TYPE_CODE_REF); 02457 } 02458 02459 02460 /* Return non-zero if TYPE is a `float singleton' or `double 02461 singleton', zero otherwise. 02462 02463 A `T singleton' is a struct type with one member, whose type is 02464 either T or a `T singleton'. So, the following are all float 02465 singletons: 02466 02467 struct { float x }; 02468 struct { struct { float x; } x; }; 02469 struct { struct { struct { float x; } x; } x; }; 02470 02471 ... and so on. 02472 02473 All such structures are passed as if they were floats or doubles, 02474 as the (revised) ABI says. */ 02475 static int 02476 is_float_singleton (struct type *type) 02477 { 02478 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) 02479 { 02480 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); 02481 CHECK_TYPEDEF (singleton_type); 02482 02483 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT 02484 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT 02485 || is_float_singleton (singleton_type)); 02486 } 02487 02488 return 0; 02489 } 02490 02491 02492 /* Return non-zero if TYPE is a struct-like type, zero otherwise. 02493 "Struct-like" types are those that should be passed as structs are: 02494 structs and unions. 02495 02496 As an odd quirk, not mentioned in the ABI, GCC passes float and 02497 double singletons as if they were a plain float, double, etc. (The 02498 corresponding union types are handled normally.) So we exclude 02499 those types here. *shrug* */ 02500 static int 02501 is_struct_like (struct type *type) 02502 { 02503 enum type_code code = TYPE_CODE (type); 02504 02505 return (code == TYPE_CODE_UNION 02506 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); 02507 } 02508 02509 02510 /* Return non-zero if TYPE is a float-like type, zero otherwise. 02511 "Float-like" types are those that should be passed as 02512 floating-point values are. 02513 02514 You'd think this would just be floats, doubles, long doubles, etc. 02515 But as an odd quirk, not mentioned in the ABI, GCC passes float and 02516 double singletons as if they were a plain float, double, etc. (The 02517 corresponding union types are handled normally.) So we include 02518 those types here. *shrug* */ 02519 static int 02520 is_float_like (struct type *type) 02521 { 02522 return (TYPE_CODE (type) == TYPE_CODE_FLT 02523 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT 02524 || is_float_singleton (type)); 02525 } 02526 02527 02528 static int 02529 is_power_of_two (unsigned int n) 02530 { 02531 return ((n & (n - 1)) == 0); 02532 } 02533 02534 /* Return non-zero if TYPE should be passed as a pointer to a copy, 02535 zero otherwise. */ 02536 static int 02537 s390_function_arg_pass_by_reference (struct type *type) 02538 { 02539 if (TYPE_LENGTH (type) > 8) 02540 return 1; 02541 02542 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type))) 02543 || TYPE_CODE (type) == TYPE_CODE_COMPLEX 02544 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)); 02545 } 02546 02547 /* Return non-zero if TYPE should be passed in a float register 02548 if possible. */ 02549 static int 02550 s390_function_arg_float (struct type *type) 02551 { 02552 if (TYPE_LENGTH (type) > 8) 02553 return 0; 02554 02555 return is_float_like (type); 02556 } 02557 02558 /* Return non-zero if TYPE should be passed in an integer register 02559 (or a pair of integer registers) if possible. */ 02560 static int 02561 s390_function_arg_integer (struct type *type) 02562 { 02563 if (TYPE_LENGTH (type) > 8) 02564 return 0; 02565 02566 return is_integer_like (type) 02567 || is_pointer_like (type) 02568 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type))); 02569 } 02570 02571 /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full 02572 word as required for the ABI. */ 02573 static LONGEST 02574 extend_simple_arg (struct gdbarch *gdbarch, struct value *arg) 02575 { 02576 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 02577 struct type *type = check_typedef (value_type (arg)); 02578 02579 /* Even structs get passed in the least significant bits of the 02580 register / memory word. It's not really right to extract them as 02581 an integer, but it does take care of the extension. */ 02582 if (TYPE_UNSIGNED (type)) 02583 return extract_unsigned_integer (value_contents (arg), 02584 TYPE_LENGTH (type), byte_order); 02585 else 02586 return extract_signed_integer (value_contents (arg), 02587 TYPE_LENGTH (type), byte_order); 02588 } 02589 02590 02591 /* Return the alignment required by TYPE. */ 02592 static int 02593 alignment_of (struct type *type) 02594 { 02595 int alignment; 02596 02597 if (is_integer_like (type) 02598 || is_pointer_like (type) 02599 || TYPE_CODE (type) == TYPE_CODE_FLT 02600 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) 02601 alignment = TYPE_LENGTH (type); 02602 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT 02603 || TYPE_CODE (type) == TYPE_CODE_UNION) 02604 { 02605 int i; 02606 02607 alignment = 1; 02608 for (i = 0; i < TYPE_NFIELDS (type); i++) 02609 { 02610 int field_alignment 02611 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i))); 02612 02613 if (field_alignment > alignment) 02614 alignment = field_alignment; 02615 } 02616 } 02617 else 02618 alignment = 1; 02619 02620 /* Check that everything we ever return is a power of two. Lots of 02621 code doesn't want to deal with aligning things to arbitrary 02622 boundaries. */ 02623 gdb_assert ((alignment & (alignment - 1)) == 0); 02624 02625 return alignment; 02626 } 02627 02628 02629 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in 02630 place to be passed to a function, as specified by the "GNU/Linux 02631 for S/390 ELF Application Binary Interface Supplement". 02632 02633 SP is the current stack pointer. We must put arguments, links, 02634 padding, etc. whereever they belong, and return the new stack 02635 pointer value. 02636 02637 If STRUCT_RETURN is non-zero, then the function we're calling is 02638 going to return a structure by value; STRUCT_ADDR is the address of 02639 a block we've allocated for it on the stack. 02640 02641 Our caller has taken care of any type promotions needed to satisfy 02642 prototypes or the old K&R argument-passing rules. */ 02643 static CORE_ADDR 02644 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 02645 struct regcache *regcache, CORE_ADDR bp_addr, 02646 int nargs, struct value **args, CORE_ADDR sp, 02647 int struct_return, CORE_ADDR struct_addr) 02648 { 02649 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 02650 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 02651 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 02652 int i; 02653 02654 /* If the i'th argument is passed as a reference to a copy, then 02655 copy_addr[i] is the address of the copy we made. */ 02656 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); 02657 02658 /* Reserve space for the reference-to-copy area. */ 02659 for (i = 0; i < nargs; i++) 02660 { 02661 struct value *arg = args[i]; 02662 struct type *type = check_typedef (value_type (arg)); 02663 02664 if (s390_function_arg_pass_by_reference (type)) 02665 { 02666 sp -= TYPE_LENGTH (type); 02667 sp = align_down (sp, alignment_of (type)); 02668 copy_addr[i] = sp; 02669 } 02670 } 02671 02672 /* Reserve space for the parameter area. As a conservative 02673 simplification, we assume that everything will be passed on the 02674 stack. Since every argument larger than 8 bytes will be 02675 passed by reference, we use this simple upper bound. */ 02676 sp -= nargs * 8; 02677 02678 /* After all that, make sure it's still aligned on an eight-byte 02679 boundary. */ 02680 sp = align_down (sp, 8); 02681 02682 /* Allocate the standard frame areas: the register save area, the 02683 word reserved for the compiler (which seems kind of meaningless), 02684 and the back chain pointer. */ 02685 sp -= 16*word_size + 32; 02686 02687 /* Now we have the final SP value. Make sure we didn't underflow; 02688 on 31-bit, this would result in addresses with the high bit set, 02689 which causes confusion elsewhere. Note that if we error out 02690 here, stack and registers remain untouched. */ 02691 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp) 02692 error (_("Stack overflow")); 02693 02694 02695 /* Finally, place the actual parameters, working from SP towards 02696 higher addresses. The code above is supposed to reserve enough 02697 space for this. */ 02698 { 02699 int fr = 0; 02700 int gr = 2; 02701 CORE_ADDR starg = sp + 16*word_size + 32; 02702 02703 /* A struct is returned using general register 2. */ 02704 if (struct_return) 02705 { 02706 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, 02707 struct_addr); 02708 gr++; 02709 } 02710 02711 for (i = 0; i < nargs; i++) 02712 { 02713 struct value *arg = args[i]; 02714 struct type *type = check_typedef (value_type (arg)); 02715 unsigned length = TYPE_LENGTH (type); 02716 02717 if (s390_function_arg_pass_by_reference (type)) 02718 { 02719 /* Actually copy the argument contents to the stack slot 02720 that was reserved above. */ 02721 write_memory (copy_addr[i], value_contents (arg), length); 02722 02723 if (gr <= 6) 02724 { 02725 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, 02726 copy_addr[i]); 02727 gr++; 02728 } 02729 else 02730 { 02731 write_memory_unsigned_integer (starg, word_size, byte_order, 02732 copy_addr[i]); 02733 starg += word_size; 02734 } 02735 } 02736 else if (s390_function_arg_float (type)) 02737 { 02738 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, 02739 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ 02740 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) 02741 { 02742 /* When we store a single-precision value in an FP register, 02743 it occupies the leftmost bits. */ 02744 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, 02745 0, length, value_contents (arg)); 02746 fr += 2; 02747 } 02748 else 02749 { 02750 /* When we store a single-precision value in a stack slot, 02751 it occupies the rightmost bits. */ 02752 starg = align_up (starg + length, word_size); 02753 write_memory (starg - length, value_contents (arg), length); 02754 } 02755 } 02756 else if (s390_function_arg_integer (type) && length <= word_size) 02757 { 02758 if (gr <= 6) 02759 { 02760 /* Integer arguments are always extended to word size. */ 02761 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, 02762 extend_simple_arg (gdbarch, 02763 arg)); 02764 gr++; 02765 } 02766 else 02767 { 02768 /* Integer arguments are always extended to word size. */ 02769 write_memory_signed_integer (starg, word_size, byte_order, 02770 extend_simple_arg (gdbarch, arg)); 02771 starg += word_size; 02772 } 02773 } 02774 else if (s390_function_arg_integer (type) && length == 2*word_size) 02775 { 02776 if (gr <= 5) 02777 { 02778 regcache_cooked_write (regcache, S390_R0_REGNUM + gr, 02779 value_contents (arg)); 02780 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, 02781 value_contents (arg) + word_size); 02782 gr += 2; 02783 } 02784 else 02785 { 02786 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG 02787 in it, then don't go back and use it again later. */ 02788 gr = 7; 02789 02790 write_memory (starg, value_contents (arg), length); 02791 starg += length; 02792 } 02793 } 02794 else 02795 internal_error (__FILE__, __LINE__, _("unknown argument type")); 02796 } 02797 } 02798 02799 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */ 02800 if (word_size == 4) 02801 { 02802 ULONGEST pswa; 02803 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa); 02804 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000); 02805 } 02806 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); 02807 02808 /* Store updated stack pointer. */ 02809 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); 02810 02811 /* We need to return the 'stack part' of the frame ID, 02812 which is actually the top of the register save area. */ 02813 return sp + 16*word_size + 32; 02814 } 02815 02816 /* Assuming THIS_FRAME is a dummy, return the frame ID of that 02817 dummy frame. The frame ID's base needs to match the TOS value 02818 returned by push_dummy_call, and the PC match the dummy frame's 02819 breakpoint. */ 02820 static struct frame_id 02821 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) 02822 { 02823 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 02824 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); 02825 sp = gdbarch_addr_bits_remove (gdbarch, sp); 02826 02827 return frame_id_build (sp + 16*word_size + 32, 02828 get_frame_pc (this_frame)); 02829 } 02830 02831 static CORE_ADDR 02832 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) 02833 { 02834 /* Both the 32- and 64-bit ABI's say that the stack pointer should 02835 always be aligned on an eight-byte boundary. */ 02836 return (addr & -8); 02837 } 02838 02839 02840 /* Function return value access. */ 02841 02842 static enum return_value_convention 02843 s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) 02844 { 02845 if (TYPE_LENGTH (type) > 8) 02846 return RETURN_VALUE_STRUCT_CONVENTION; 02847 02848 switch (TYPE_CODE (type)) 02849 { 02850 case TYPE_CODE_STRUCT: 02851 case TYPE_CODE_UNION: 02852 case TYPE_CODE_ARRAY: 02853 case TYPE_CODE_COMPLEX: 02854 return RETURN_VALUE_STRUCT_CONVENTION; 02855 02856 default: 02857 return RETURN_VALUE_REGISTER_CONVENTION; 02858 } 02859 } 02860 02861 static enum return_value_convention 02862 s390_return_value (struct gdbarch *gdbarch, struct value *function, 02863 struct type *type, struct regcache *regcache, 02864 gdb_byte *out, const gdb_byte *in) 02865 { 02866 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 02867 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 02868 enum return_value_convention rvc; 02869 int length; 02870 02871 type = check_typedef (type); 02872 rvc = s390_return_value_convention (gdbarch, type); 02873 length = TYPE_LENGTH (type); 02874 02875 if (in) 02876 { 02877 switch (rvc) 02878 { 02879 case RETURN_VALUE_REGISTER_CONVENTION: 02880 if (TYPE_CODE (type) == TYPE_CODE_FLT 02881 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) 02882 { 02883 /* When we store a single-precision value in an FP register, 02884 it occupies the leftmost bits. */ 02885 regcache_cooked_write_part (regcache, S390_F0_REGNUM, 02886 0, length, in); 02887 } 02888 else if (length <= word_size) 02889 { 02890 /* Integer arguments are always extended to word size. */ 02891 if (TYPE_UNSIGNED (type)) 02892 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, 02893 extract_unsigned_integer (in, length, byte_order)); 02894 else 02895 regcache_cooked_write_signed (regcache, S390_R2_REGNUM, 02896 extract_signed_integer (in, length, byte_order)); 02897 } 02898 else if (length == 2*word_size) 02899 { 02900 regcache_cooked_write (regcache, S390_R2_REGNUM, in); 02901 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size); 02902 } 02903 else 02904 internal_error (__FILE__, __LINE__, _("invalid return type")); 02905 break; 02906 02907 case RETURN_VALUE_STRUCT_CONVENTION: 02908 error (_("Cannot set function return value.")); 02909 break; 02910 } 02911 } 02912 else if (out) 02913 { 02914 switch (rvc) 02915 { 02916 case RETURN_VALUE_REGISTER_CONVENTION: 02917 if (TYPE_CODE (type) == TYPE_CODE_FLT 02918 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) 02919 { 02920 /* When we store a single-precision value in an FP register, 02921 it occupies the leftmost bits. */ 02922 regcache_cooked_read_part (regcache, S390_F0_REGNUM, 02923 0, length, out); 02924 } 02925 else if (length <= word_size) 02926 { 02927 /* Integer arguments occupy the rightmost bits. */ 02928 regcache_cooked_read_part (regcache, S390_R2_REGNUM, 02929 word_size - length, length, out); 02930 } 02931 else if (length == 2*word_size) 02932 { 02933 regcache_cooked_read (regcache, S390_R2_REGNUM, out); 02934 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size); 02935 } 02936 else 02937 internal_error (__FILE__, __LINE__, _("invalid return type")); 02938 break; 02939 02940 case RETURN_VALUE_STRUCT_CONVENTION: 02941 error (_("Function return value unknown.")); 02942 break; 02943 } 02944 } 02945 02946 return rvc; 02947 } 02948 02949 02950 /* Breakpoints. */ 02951 02952 static const gdb_byte * 02953 s390_breakpoint_from_pc (struct gdbarch *gdbarch, 02954 CORE_ADDR *pcptr, int *lenptr) 02955 { 02956 static const gdb_byte breakpoint[] = { 0x0, 0x1 }; 02957 02958 *lenptr = sizeof (breakpoint); 02959 return breakpoint; 02960 } 02961 02962 02963 /* Address handling. */ 02964 02965 static CORE_ADDR 02966 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) 02967 { 02968 return addr & 0x7fffffff; 02969 } 02970 02971 static int 02972 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) 02973 { 02974 if (byte_size == 4) 02975 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; 02976 else 02977 return 0; 02978 } 02979 02980 static const char * 02981 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) 02982 { 02983 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) 02984 return "mode32"; 02985 else 02986 return NULL; 02987 } 02988 02989 static int 02990 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, 02991 const char *name, 02992 int *type_flags_ptr) 02993 { 02994 if (strcmp (name, "mode32") == 0) 02995 { 02996 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; 02997 return 1; 02998 } 02999 else 03000 return 0; 03001 } 03002 03003 /* Implementation of `gdbarch_stap_is_single_operand', as defined in 03004 gdbarch.h. */ 03005 03006 static int 03007 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) 03008 { 03009 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement 03010 or indirection. */ 03011 || *s == '%' /* Register access. */ 03012 || isdigit (*s)); /* Literal number. */ 03013 } 03014 03015 /* Set up gdbarch struct. */ 03016 03017 static struct gdbarch * 03018 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 03019 { 03020 const struct target_desc *tdesc = info.target_desc; 03021 struct tdesc_arch_data *tdesc_data = NULL; 03022 struct gdbarch *gdbarch; 03023 struct gdbarch_tdep *tdep; 03024 int tdep_abi; 03025 int have_upper = 0; 03026 int have_linux_v1 = 0; 03027 int have_linux_v2 = 0; 03028 int first_pseudo_reg, last_pseudo_reg; 03029 03030 /* Default ABI and register size. */ 03031 switch (info.bfd_arch_info->mach) 03032 { 03033 case bfd_mach_s390_31: 03034 tdep_abi = ABI_LINUX_S390; 03035 break; 03036 03037 case bfd_mach_s390_64: 03038 tdep_abi = ABI_LINUX_ZSERIES; 03039 break; 03040 03041 default: 03042 return NULL; 03043 } 03044 03045 /* Use default target description if none provided by the target. */ 03046 if (!tdesc_has_registers (tdesc)) 03047 { 03048 if (tdep_abi == ABI_LINUX_S390) 03049 tdesc = tdesc_s390_linux32; 03050 else 03051 tdesc = tdesc_s390x_linux64; 03052 } 03053 03054 /* Check any target description for validity. */ 03055 if (tdesc_has_registers (tdesc)) 03056 { 03057 static const char *const gprs[] = { 03058 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 03059 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 03060 }; 03061 static const char *const fprs[] = { 03062 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 03063 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" 03064 }; 03065 static const char *const acrs[] = { 03066 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", 03067 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" 03068 }; 03069 static const char *const gprs_lower[] = { 03070 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", 03071 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" 03072 }; 03073 static const char *const gprs_upper[] = { 03074 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", 03075 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" 03076 }; 03077 static const char *const tdb_regs[] = { 03078 "tdb0", "tac", "tct", "atia", 03079 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7", 03080 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15" 03081 }; 03082 const struct tdesc_feature *feature; 03083 int i, valid_p = 1; 03084 03085 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); 03086 if (feature == NULL) 03087 return NULL; 03088 03089 tdesc_data = tdesc_data_alloc (); 03090 03091 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03092 S390_PSWM_REGNUM, "pswm"); 03093 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03094 S390_PSWA_REGNUM, "pswa"); 03095 03096 if (tdesc_unnumbered_register (feature, "r0")) 03097 { 03098 for (i = 0; i < 16; i++) 03099 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03100 S390_R0_REGNUM + i, gprs[i]); 03101 } 03102 else 03103 { 03104 have_upper = 1; 03105 03106 for (i = 0; i < 16; i++) 03107 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03108 S390_R0_REGNUM + i, 03109 gprs_lower[i]); 03110 for (i = 0; i < 16; i++) 03111 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03112 S390_R0_UPPER_REGNUM + i, 03113 gprs_upper[i]); 03114 } 03115 03116 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); 03117 if (feature == NULL) 03118 { 03119 tdesc_data_cleanup (tdesc_data); 03120 return NULL; 03121 } 03122 03123 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03124 S390_FPC_REGNUM, "fpc"); 03125 for (i = 0; i < 16; i++) 03126 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03127 S390_F0_REGNUM + i, fprs[i]); 03128 03129 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); 03130 if (feature == NULL) 03131 { 03132 tdesc_data_cleanup (tdesc_data); 03133 return NULL; 03134 } 03135 03136 for (i = 0; i < 16; i++) 03137 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03138 S390_A0_REGNUM + i, acrs[i]); 03139 03140 /* Optional GNU/Linux-specific "registers". */ 03141 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux"); 03142 if (feature) 03143 { 03144 tdesc_numbered_register (feature, tdesc_data, 03145 S390_ORIG_R2_REGNUM, "orig_r2"); 03146 03147 if (tdesc_numbered_register (feature, tdesc_data, 03148 S390_LAST_BREAK_REGNUM, "last_break")) 03149 have_linux_v1 = 1; 03150 03151 if (tdesc_numbered_register (feature, tdesc_data, 03152 S390_SYSTEM_CALL_REGNUM, "system_call")) 03153 have_linux_v2 = 1; 03154 03155 if (have_linux_v2 > have_linux_v1) 03156 valid_p = 0; 03157 } 03158 03159 /* Transaction diagnostic block. */ 03160 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb"); 03161 if (feature) 03162 { 03163 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++) 03164 valid_p &= tdesc_numbered_register (feature, tdesc_data, 03165 S390_TDB_DWORD0_REGNUM + i, 03166 tdb_regs[i]); 03167 } 03168 03169 if (!valid_p) 03170 { 03171 tdesc_data_cleanup (tdesc_data); 03172 return NULL; 03173 } 03174 } 03175 03176 /* Find a candidate among extant architectures. */ 03177 for (arches = gdbarch_list_lookup_by_info (arches, &info); 03178 arches != NULL; 03179 arches = gdbarch_list_lookup_by_info (arches->next, &info)) 03180 { 03181 tdep = gdbarch_tdep (arches->gdbarch); 03182 if (!tdep) 03183 continue; 03184 if (tdep->abi != tdep_abi) 03185 continue; 03186 if ((tdep->gpr_full_regnum != -1) != have_upper) 03187 continue; 03188 if (tdesc_data != NULL) 03189 tdesc_data_cleanup (tdesc_data); 03190 return arches->gdbarch; 03191 } 03192 03193 /* Otherwise create a new gdbarch for the specified machine type. */ 03194 tdep = XCALLOC (1, struct gdbarch_tdep); 03195 tdep->abi = tdep_abi; 03196 gdbarch = gdbarch_alloc (&info, tdep); 03197 03198 set_gdbarch_believe_pcc_promotion (gdbarch, 0); 03199 set_gdbarch_char_signed (gdbarch, 0); 03200 03201 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. 03202 We can safely let them default to 128-bit, since the debug info 03203 will give the size of type actually used in each case. */ 03204 set_gdbarch_long_double_bit (gdbarch, 128); 03205 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); 03206 03207 /* Amount PC must be decremented by after a breakpoint. This is 03208 often the number of bytes returned by gdbarch_breakpoint_from_pc but not 03209 always. */ 03210 set_gdbarch_decr_pc_after_break (gdbarch, 2); 03211 /* Stack grows downward. */ 03212 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 03213 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); 03214 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); 03215 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); 03216 03217 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); 03218 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); 03219 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); 03220 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); 03221 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); 03222 set_gdbarch_value_from_register (gdbarch, s390_value_from_register); 03223 set_gdbarch_regset_from_core_section (gdbarch, 03224 s390_regset_from_core_section); 03225 set_gdbarch_core_read_description (gdbarch, s390_core_read_description); 03226 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register); 03227 set_gdbarch_write_pc (gdbarch, s390_write_pc); 03228 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); 03229 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); 03230 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); 03231 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); 03232 set_tdesc_pseudo_register_reggroup_p (gdbarch, 03233 s390_pseudo_register_reggroup_p); 03234 tdesc_use_registers (gdbarch, tdesc, tdesc_data); 03235 03236 /* Assign pseudo register numbers. */ 03237 first_pseudo_reg = gdbarch_num_regs (gdbarch); 03238 last_pseudo_reg = first_pseudo_reg; 03239 tdep->gpr_full_regnum = -1; 03240 if (have_upper) 03241 { 03242 tdep->gpr_full_regnum = last_pseudo_reg; 03243 last_pseudo_reg += 16; 03244 } 03245 tdep->pc_regnum = last_pseudo_reg++; 03246 tdep->cc_regnum = last_pseudo_reg++; 03247 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); 03248 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); 03249 03250 /* Inferior function calls. */ 03251 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); 03252 set_gdbarch_dummy_id (gdbarch, s390_dummy_id); 03253 set_gdbarch_frame_align (gdbarch, s390_frame_align); 03254 set_gdbarch_return_value (gdbarch, s390_return_value); 03255 03256 /* Frame handling. */ 03257 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); 03258 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); 03259 dwarf2_append_unwinders (gdbarch); 03260 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); 03261 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); 03262 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); 03263 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); 03264 frame_base_set_default (gdbarch, &s390_frame_base); 03265 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); 03266 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); 03267 03268 /* Displaced stepping. */ 03269 set_gdbarch_displaced_step_copy_insn (gdbarch, 03270 simple_displaced_step_copy_insn); 03271 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); 03272 set_gdbarch_displaced_step_free_closure (gdbarch, 03273 simple_displaced_step_free_closure); 03274 set_gdbarch_displaced_step_location (gdbarch, 03275 displaced_step_at_entry_point); 03276 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); 03277 03278 /* Note that GNU/Linux is the only OS supported on this 03279 platform. */ 03280 linux_init_abi (info, gdbarch); 03281 03282 switch (tdep->abi) 03283 { 03284 case ABI_LINUX_S390: 03285 tdep->gregset = &s390_gregset; 03286 tdep->sizeof_gregset = s390_sizeof_gregset; 03287 tdep->fpregset = &s390_fpregset; 03288 tdep->sizeof_fpregset = s390_sizeof_fpregset; 03289 03290 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); 03291 set_solib_svr4_fetch_link_map_offsets 03292 (gdbarch, svr4_ilp32_fetch_link_map_offsets); 03293 03294 if (have_upper) 03295 { 03296 if (have_linux_v2) 03297 set_gdbarch_core_regset_sections (gdbarch, 03298 s390_linux64v2_regset_sections); 03299 else if (have_linux_v1) 03300 set_gdbarch_core_regset_sections (gdbarch, 03301 s390_linux64v1_regset_sections); 03302 else 03303 set_gdbarch_core_regset_sections (gdbarch, 03304 s390_linux64_regset_sections); 03305 } 03306 else 03307 { 03308 if (have_linux_v2) 03309 set_gdbarch_core_regset_sections (gdbarch, 03310 s390_linux32v2_regset_sections); 03311 else if (have_linux_v1) 03312 set_gdbarch_core_regset_sections (gdbarch, 03313 s390_linux32v1_regset_sections); 03314 else 03315 set_gdbarch_core_regset_sections (gdbarch, 03316 s390_linux32_regset_sections); 03317 } 03318 break; 03319 03320 case ABI_LINUX_ZSERIES: 03321 tdep->gregset = &s390x_gregset; 03322 tdep->sizeof_gregset = s390x_sizeof_gregset; 03323 tdep->fpregset = &s390_fpregset; 03324 tdep->sizeof_fpregset = s390_sizeof_fpregset; 03325 03326 set_gdbarch_long_bit (gdbarch, 64); 03327 set_gdbarch_long_long_bit (gdbarch, 64); 03328 set_gdbarch_ptr_bit (gdbarch, 64); 03329 set_solib_svr4_fetch_link_map_offsets 03330 (gdbarch, svr4_lp64_fetch_link_map_offsets); 03331 set_gdbarch_address_class_type_flags (gdbarch, 03332 s390_address_class_type_flags); 03333 set_gdbarch_address_class_type_flags_to_name (gdbarch, 03334 s390_address_class_type_flags_to_name); 03335 set_gdbarch_address_class_name_to_type_flags (gdbarch, 03336 s390_address_class_name_to_type_flags); 03337 03338 if (have_linux_v2) 03339 set_gdbarch_core_regset_sections (gdbarch, 03340 s390x_linux64v2_regset_sections); 03341 else if (have_linux_v1) 03342 set_gdbarch_core_regset_sections (gdbarch, 03343 s390x_linux64v1_regset_sections); 03344 else 03345 set_gdbarch_core_regset_sections (gdbarch, 03346 s390x_linux64_regset_sections); 03347 break; 03348 } 03349 03350 set_gdbarch_print_insn (gdbarch, print_insn_s390); 03351 03352 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); 03353 03354 /* Enable TLS support. */ 03355 set_gdbarch_fetch_tls_load_module_address (gdbarch, 03356 svr4_fetch_objfile_link_map); 03357 03358 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type); 03359 03360 /* SystemTap functions. */ 03361 set_gdbarch_stap_register_prefix (gdbarch, "%"); 03362 set_gdbarch_stap_register_indirection_prefix (gdbarch, "("); 03363 set_gdbarch_stap_register_indirection_suffix (gdbarch, ")"); 03364 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand); 03365 03366 return gdbarch; 03367 } 03368 03369 03370 extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ 03371 03372 void 03373 _initialize_s390_tdep (void) 03374 { 03375 /* Hook us into the gdbarch mechanism. */ 03376 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); 03377 03378 /* Initialize the GNU/Linux target descriptions. */ 03379 initialize_tdesc_s390_linux32 (); 03380 initialize_tdesc_s390_linux32v1 (); 03381 initialize_tdesc_s390_linux32v2 (); 03382 initialize_tdesc_s390_linux64 (); 03383 initialize_tdesc_s390_linux64v1 (); 03384 initialize_tdesc_s390_linux64v2 (); 03385 initialize_tdesc_s390_te_linux64 (); 03386 initialize_tdesc_s390x_linux64 (); 03387 initialize_tdesc_s390x_linux64v1 (); 03388 initialize_tdesc_s390x_linux64v2 (); 03389 initialize_tdesc_s390x_te_linux64 (); 03390 }