GDB (API)
/home/stan/gdb/src/gdb/msp430-tdep.c
Go to the documentation of this file.
00001 /* Target-dependent code for the Texas Instruments MSP430 for GDB, the
00002    GNU debugger.
00003 
00004    Copyright (C) 2012, 2013 Free Software Foundation, Inc.
00005 
00006    Contributed by Red Hat, Inc.
00007 
00008    This file is part of GDB.
00009 
00010    This program is free software; you can redistribute it and/or modify
00011    it under the terms of the GNU General Public License as published by
00012    the Free Software Foundation; either version 3 of the License, or
00013    (at your option) any later version.
00014 
00015    This program is distributed in the hope that it will be useful,
00016    but WITHOUT ANY WARRANTY; without even the implied warranty of
00017    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00018    GNU General Public License for more details.
00019 
00020    You should have received a copy of the GNU General Public License
00021    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
00022 
00023 #include "defs.h"
00024 #include "arch-utils.h"
00025 #include "prologue-value.h"
00026 #include "target.h"
00027 #include "regcache.h"
00028 #include "dis-asm.h"
00029 #include "gdbtypes.h"
00030 #include "frame.h"
00031 #include "frame-unwind.h"
00032 #include "frame-base.h"
00033 #include "value.h"
00034 #include "gdbcore.h"
00035 #include "dwarf2-frame.h"
00036 #include "reggroups.h"
00037 
00038 #include "elf/msp430.h"
00039 #include "opcode/msp430-decode.h"
00040 #include "elf-bfd.h"
00041 
00042 /* Register Numbers.  */
00043 
00044 enum
00045 {
00046   MSP430_PC_RAW_REGNUM,
00047   MSP430_SP_RAW_REGNUM,
00048   MSP430_SR_RAW_REGNUM,
00049   MSP430_CG_RAW_REGNUM,
00050   MSP430_R4_RAW_REGNUM,
00051   MSP430_R5_RAW_REGNUM,
00052   MSP430_R6_RAW_REGNUM,
00053   MSP430_R7_RAW_REGNUM,
00054   MSP430_R8_RAW_REGNUM,
00055   MSP430_R9_RAW_REGNUM,
00056   MSP430_R10_RAW_REGNUM,
00057   MSP430_R11_RAW_REGNUM,
00058   MSP430_R12_RAW_REGNUM,
00059   MSP430_R13_RAW_REGNUM,
00060   MSP430_R14_RAW_REGNUM,
00061   MSP430_R15_RAW_REGNUM,
00062 
00063   MSP430_NUM_REGS,
00064 
00065   MSP430_PC_REGNUM = MSP430_NUM_REGS,
00066   MSP430_SP_REGNUM,
00067   MSP430_SR_REGNUM,
00068   MSP430_CG_REGNUM,
00069   MSP430_R4_REGNUM,
00070   MSP430_R5_REGNUM,
00071   MSP430_R6_REGNUM,
00072   MSP430_R7_REGNUM,
00073   MSP430_R8_REGNUM,
00074   MSP430_R9_REGNUM,
00075   MSP430_R10_REGNUM,
00076   MSP430_R11_REGNUM,
00077   MSP430_R12_REGNUM,
00078   MSP430_R13_REGNUM,
00079   MSP430_R14_REGNUM,
00080   MSP430_R15_REGNUM,
00081 
00082   MSP430_NUM_TOTAL_REGS,
00083   MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS
00084 };
00085 
00086 enum
00087 {
00088   /* TI MSP430 Architecture.  */
00089   MSP_ISA_MSP430,
00090 
00091   /* TI MSP430X Architecture.  */
00092   MSP_ISA_MSP430X
00093 };
00094 
00095 enum
00096 {
00097   /* The small code model limits code addresses to 16 bits.  */
00098   MSP_SMALL_CODE_MODEL,
00099 
00100   /* The large code model uses 20 bit addresses for function
00101      pointers.  These are stored in memory using four bytes (32 bits).  */
00102   MSP_LARGE_CODE_MODEL
00103 };
00104 
00105 /* Architecture specific data.  */
00106 
00107 struct gdbarch_tdep
00108 {
00109   /* The ELF header flags specify the multilib used.  */
00110   int elf_flags;
00111 
00112   /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X.  */
00113   int isa;
00114 
00115   /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL.  If, at
00116      some point, we support different data models too, we'll probably
00117      structure things so that we can combine values using logical
00118      "or".  */
00119   int code_model;
00120 };
00121 
00122 /* This structure holds the results of a prologue analysis.  */
00123 
00124 struct msp430_prologue
00125 {
00126   /* The offset from the frame base to the stack pointer --- always
00127      zero or negative.
00128 
00129      Calling this a "size" is a bit misleading, but given that the
00130      stack grows downwards, using offsets for everything keeps one
00131      from going completely sign-crazy: you never change anything's
00132      sign for an ADD instruction; always change the second operand's
00133      sign for a SUB instruction; and everything takes care of
00134      itself.  */
00135   int frame_size;
00136 
00137   /* Non-zero if this function has initialized the frame pointer from
00138      the stack pointer, zero otherwise.  */
00139   int has_frame_ptr;
00140 
00141   /* If has_frame_ptr is non-zero, this is the offset from the frame
00142      base to where the frame pointer points.  This is always zero or
00143      negative.  */
00144   int frame_ptr_offset;
00145 
00146   /* The address of the first instruction at which the frame has been
00147      set up and the arguments are where the debug info says they are
00148      --- as best as we can tell.  */
00149   CORE_ADDR prologue_end;
00150 
00151   /* reg_offset[R] is the offset from the CFA at which register R is
00152      saved, or 1 if register R has not been saved.  (Real values are
00153      always zero or negative.)  */
00154   int reg_offset[MSP430_NUM_TOTAL_REGS];
00155 };
00156 
00157 /* Implement the "register_type" gdbarch method.  */
00158 
00159 static struct type *
00160 msp430_register_type (struct gdbarch *gdbarch, int reg_nr)
00161 {
00162   if (reg_nr < MSP430_NUM_REGS)
00163     return builtin_type (gdbarch)->builtin_uint32;
00164   else if (reg_nr == MSP430_PC_REGNUM)
00165     return builtin_type (gdbarch)->builtin_func_ptr;
00166   else
00167     return builtin_type (gdbarch)->builtin_uint16;
00168 }
00169 
00170 /* Implement another version of the "register_type" gdbarch method
00171    for msp430x.  */
00172 
00173 static struct type *
00174 msp430x_register_type (struct gdbarch *gdbarch, int reg_nr)
00175 {
00176   if (reg_nr < MSP430_NUM_REGS)
00177     return builtin_type (gdbarch)->builtin_uint32;
00178   else if (reg_nr == MSP430_PC_REGNUM)
00179     return builtin_type (gdbarch)->builtin_func_ptr;
00180   else
00181     return builtin_type (gdbarch)->builtin_uint32;
00182 }
00183 
00184 /* Implement the "register_name" gdbarch method.  */
00185 
00186 static const char *
00187 msp430_register_name (struct gdbarch *gdbarch, int regnr)
00188 {
00189   static const char *const reg_names[] = {
00190     /* Raw registers.  */
00191     "", "", "", "", "", "", "", "",
00192     "", "", "", "", "", "", "", "",
00193     /* Pseudo registers.  */
00194     "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7",
00195     "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
00196   };
00197 
00198   return reg_names[regnr];
00199 }
00200 
00201 /* Implement the "register_reggroup_p" gdbarch method.  */
00202 
00203 static int
00204 msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
00205                             struct reggroup *group)
00206 {
00207   if (group == all_reggroup)
00208     return 1;
00209 
00210   /* All other registers are saved and restored.  */
00211   if (group == save_reggroup || group == restore_reggroup)
00212     return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS);
00213 
00214   return group == general_reggroup;
00215 }
00216 
00217 /* Implement the "pseudo_register_read" gdbarch method.  */
00218 
00219 static enum register_status
00220 msp430_pseudo_register_read (struct gdbarch *gdbarch,
00221                              struct regcache *regcache,
00222                              int regnum, gdb_byte *buffer)
00223 {
00224   enum register_status status = REG_UNKNOWN;
00225 
00226   if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
00227     {
00228       ULONGEST val;
00229       enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
00230       int regsize = register_size (gdbarch, regnum);
00231       int raw_regnum = regnum - MSP430_NUM_REGS;
00232 
00233       status = regcache_raw_read_unsigned (regcache, raw_regnum, &val);
00234       if (status == REG_VALID)
00235         store_unsigned_integer (buffer, regsize, byte_order, val);
00236 
00237     }
00238   else
00239     gdb_assert_not_reached ("invalid pseudo register number");
00240 
00241   return status;
00242 }
00243 
00244 /* Implement the "pseudo_register_write" gdbarch method.  */
00245 
00246 static void
00247 msp430_pseudo_register_write (struct gdbarch *gdbarch,
00248                               struct regcache *regcache,
00249                               int regnum, const gdb_byte *buffer)
00250 {
00251   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
00252   if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
00253 
00254     {
00255       ULONGEST val;
00256       enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
00257       int regsize = register_size (gdbarch, regnum);
00258       int raw_regnum = regnum - MSP430_NUM_REGS;
00259 
00260       val = extract_unsigned_integer (buffer, regsize, byte_order);
00261       regcache_raw_write_unsigned (regcache, raw_regnum, val);
00262 
00263     }
00264   else
00265     gdb_assert_not_reached ("invalid pseudo register number");
00266 }
00267 
00268 /* Implement the `register_sim_regno' gdbarch method.  */
00269 
00270 static int
00271 msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum)
00272 {
00273   gdb_assert (regnum < MSP430_NUM_REGS);
00274 
00275   /* So long as regnum is in [0, RL78_NUM_REGS), it's valid.  We
00276      just want to override the default here which disallows register
00277      numbers which have no names.  */
00278   return regnum;
00279 }
00280 
00281 /* Implement the "breakpoint_from_pc" gdbarch method.  */
00282 
00283 static const gdb_byte *
00284 msp430_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
00285                            int *lenptr)
00286 {
00287   static gdb_byte breakpoint[] = { 0x43, 0x43 };
00288 
00289   *lenptr = sizeof breakpoint;
00290   return breakpoint;
00291 }
00292 
00293 /* Define a "handle" struct for fetching the next opcode.  */
00294 
00295 struct msp430_get_opcode_byte_handle
00296 {
00297   CORE_ADDR pc;
00298 };
00299 
00300 /* Fetch a byte on behalf of the opcode decoder.  HANDLE contains
00301    the memory address of the next byte to fetch.  If successful,
00302    the address in the handle is updated and the byte fetched is
00303    returned as the value of the function.  If not successful, -1
00304    is returned.  */
00305 
00306 static int
00307 msp430_get_opcode_byte (void *handle)
00308 {
00309   struct msp430_get_opcode_byte_handle *opcdata = handle;
00310   int status;
00311   gdb_byte byte;
00312 
00313   status = target_read_memory (opcdata->pc, &byte, 1);
00314   if (status == 0)
00315     {
00316       opcdata->pc += 1;
00317       return byte;
00318     }
00319   else
00320     return -1;
00321 }
00322 
00323 /* Function for finding saved registers in a 'struct pv_area'; this
00324    function is passed to pv_area_scan.
00325 
00326    If VALUE is a saved register, ADDR says it was saved at a constant
00327    offset from the frame base, and SIZE indicates that the whole
00328    register was saved, record its offset.  */
00329 
00330 static void
00331 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
00332 {
00333   struct msp430_prologue *result = (struct msp430_prologue *) result_untyped;
00334 
00335   if (value.kind == pvk_register
00336       && value.k == 0
00337       && pv_is_register (addr, MSP430_SP_REGNUM)
00338       && size == register_size (target_gdbarch (), value.reg))
00339     result->reg_offset[value.reg] = addr.k;
00340 }
00341 
00342 /* Analyze a prologue starting at START_PC, going no further than
00343    LIMIT_PC.  Fill in RESULT as appropriate.  */
00344 
00345 static void
00346 msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
00347                          CORE_ADDR limit_pc, struct msp430_prologue *result)
00348 {
00349   CORE_ADDR pc, next_pc;
00350   int rn;
00351   pv_t reg[MSP430_NUM_TOTAL_REGS];
00352   struct pv_area *stack;
00353   struct cleanup *back_to;
00354   CORE_ADDR after_last_frame_setup_insn = start_pc;
00355   int code_model = gdbarch_tdep (gdbarch)->code_model;
00356   int sz;
00357 
00358   memset (result, 0, sizeof (*result));
00359 
00360   for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++)
00361     {
00362       reg[rn] = pv_register (rn, 0);
00363       result->reg_offset[rn] = 1;
00364     }
00365 
00366   stack = make_pv_area (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch));
00367   back_to = make_cleanup_free_pv_area (stack);
00368 
00369   /* The call instruction has saved the return address on the stack.  */
00370   sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2;
00371   reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz);
00372   pv_area_store (stack, reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]);
00373 
00374   pc = start_pc;
00375   while (pc < limit_pc)
00376     {
00377       int bytes_read;
00378       struct msp430_get_opcode_byte_handle opcode_handle;
00379       MSP430_Opcode_Decoded opc;
00380 
00381       opcode_handle.pc = pc;
00382       bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte,
00383                                          &opcode_handle);
00384       next_pc = pc + bytes_read;
00385 
00386       if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register)
00387         {
00388           int rsrc = opc.op[0].reg;
00389 
00390           reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2);
00391           pv_area_store (stack, reg[MSP430_SP_REGNUM], 2, reg[rsrc]);
00392           after_last_frame_setup_insn = next_pc;
00393         }
00394       else if (opc.id == MSO_push       /* PUSHM  */
00395                && opc.op[0].type == MSP430_Operand_None
00396                && opc.op[1].type == MSP430_Operand_Register)
00397         {
00398           int rsrc = opc.op[1].reg;
00399           int count = opc.repeats + 1;
00400           int size = opc.size == 16 ? 2 : 4;
00401 
00402           while (count > 0)
00403             {
00404               reg[MSP430_SP_REGNUM]
00405                 = pv_add_constant (reg[MSP430_SP_REGNUM], -size);
00406               pv_area_store (stack, reg[MSP430_SP_REGNUM], size, reg[rsrc]);
00407               rsrc--;
00408               count--;
00409             }
00410           after_last_frame_setup_insn = next_pc;
00411         }
00412       else if (opc.id == MSO_sub
00413                && opc.op[0].type == MSP430_Operand_Register
00414                && opc.op[0].reg == MSR_SP
00415                && opc.op[1].type == MSP430_Operand_Immediate)
00416         {
00417           int addend = opc.op[1].addend;
00418 
00419           reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM],
00420                                                    -addend);
00421           after_last_frame_setup_insn = next_pc;
00422         }
00423       else if (opc.id == MSO_mov
00424                && opc.op[0].type == MSP430_Operand_Immediate
00425                && 12 <= opc.op[0].reg && opc.op[0].reg <= 15)
00426         after_last_frame_setup_insn = next_pc;
00427       else
00428         {
00429           /* Terminate the prologue scan.  */
00430           break;
00431         }
00432 
00433       pc = next_pc;
00434     }
00435 
00436   /* Is the frame size (offset, really) a known constant?  */
00437   if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM))
00438     result->frame_size = reg[MSP430_SP_REGNUM].k;
00439 
00440   /* Record where all the registers were saved.  */
00441   pv_area_scan (stack, check_for_saved, result);
00442 
00443   result->prologue_end = after_last_frame_setup_insn;
00444 
00445   do_cleanups (back_to);
00446 }
00447 
00448 /* Implement the "skip_prologue" gdbarch method.  */
00449 
00450 static CORE_ADDR
00451 msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
00452 {
00453   const char *name;
00454   CORE_ADDR func_addr, func_end;
00455   struct msp430_prologue p;
00456 
00457   /* Try to find the extent of the function that contains PC.  */
00458   if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
00459     return pc;
00460 
00461   msp430_analyze_prologue (gdbarch, pc, func_end, &p);
00462   return p.prologue_end;
00463 }
00464 
00465 /* Implement the "unwind_pc" gdbarch method.  */
00466 
00467 static CORE_ADDR
00468 msp430_unwind_pc (struct gdbarch *arch, struct frame_info *next_frame)
00469 {
00470   return frame_unwind_register_unsigned (next_frame, MSP430_PC_REGNUM);
00471 }
00472 
00473 /* Implement the "unwind_sp" gdbarch method.  */
00474 
00475 static CORE_ADDR
00476 msp430_unwind_sp (struct gdbarch *arch, struct frame_info *next_frame)
00477 {
00478   return frame_unwind_register_unsigned (next_frame, MSP430_SP_REGNUM);
00479 }
00480 
00481 /* Given a frame described by THIS_FRAME, decode the prologue of its
00482    associated function if there is not cache entry as specified by
00483    THIS_PROLOGUE_CACHE.  Save the decoded prologue in the cache and
00484    return that struct as the value of this function.  */
00485 
00486 static struct msp430_prologue *
00487 msp430_analyze_frame_prologue (struct frame_info *this_frame,
00488                                void **this_prologue_cache)
00489 {
00490   if (!*this_prologue_cache)
00491     {
00492       CORE_ADDR func_start, stop_addr;
00493 
00494       *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue);
00495 
00496       func_start = get_frame_func (this_frame);
00497       stop_addr = get_frame_pc (this_frame);
00498 
00499       /* If we couldn't find any function containing the PC, then
00500          just initialize the prologue cache, but don't do anything.  */
00501       if (!func_start)
00502         stop_addr = func_start;
00503 
00504       msp430_analyze_prologue (get_frame_arch (this_frame), func_start,
00505                                stop_addr, *this_prologue_cache);
00506     }
00507 
00508   return *this_prologue_cache;
00509 }
00510 
00511 /* Given a frame and a prologue cache, return this frame's base.  */
00512 
00513 static CORE_ADDR
00514 msp430_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
00515 {
00516   struct msp430_prologue *p
00517     = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
00518   CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM);
00519 
00520   return sp - p->frame_size;
00521 }
00522 
00523 /* Implement the "frame_this_id" method for unwinding frames.  */
00524 
00525 static void
00526 msp430_this_id (struct frame_info *this_frame,
00527                 void **this_prologue_cache, struct frame_id *this_id)
00528 {
00529   *this_id = frame_id_build (msp430_frame_base (this_frame,
00530                                                 this_prologue_cache),
00531                              get_frame_func (this_frame));
00532 }
00533 
00534 /* Implement the "frame_prev_register" method for unwinding frames.  */
00535 
00536 static struct value *
00537 msp430_prev_register (struct frame_info *this_frame,
00538                       void **this_prologue_cache, int regnum)
00539 {
00540   struct msp430_prologue *p
00541     = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
00542   CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache);
00543 
00544   if (regnum == MSP430_SP_REGNUM)
00545     return frame_unwind_got_constant (this_frame, regnum, frame_base);
00546 
00547   /* If prologue analysis says we saved this register somewhere,
00548      return a description of the stack slot holding it.  */
00549   else if (p->reg_offset[regnum] != 1)
00550     {
00551       struct value *rv = frame_unwind_got_memory (this_frame, regnum,
00552                                                   frame_base +
00553                                                   p->reg_offset[regnum]);
00554 
00555       if (regnum == MSP430_PC_REGNUM)
00556         {
00557           ULONGEST pc = value_as_long (rv);
00558 
00559           return frame_unwind_got_constant (this_frame, regnum, pc);
00560         }
00561       return rv;
00562     }
00563 
00564   /* Otherwise, presume we haven't changed the value of this
00565      register, and get it from the next frame.  */
00566   else
00567     return frame_unwind_got_register (this_frame, regnum, regnum);
00568 }
00569 
00570 static const struct frame_unwind msp430_unwind = {
00571   NORMAL_FRAME,
00572   default_frame_unwind_stop_reason,
00573   msp430_this_id,
00574   msp430_prev_register,
00575   NULL,
00576   default_frame_sniffer
00577 };
00578 
00579 /* Implement the "dwarf2_reg_to_regnum" gdbarch method.  */
00580 
00581 static int
00582 msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
00583 {
00584   if (reg < MSP430_NUM_REGS)
00585     return reg + MSP430_NUM_REGS;
00586   else
00587     {
00588       warning (_("Unmapped DWARF Register #%d encountered."), reg);
00589       return -1;
00590     }
00591 }
00592 
00593 /* Implement the "return_value" gdbarch method.  */
00594 
00595 static enum return_value_convention
00596 msp430_return_value (struct gdbarch *gdbarch,
00597                      struct value *function,
00598                      struct type *valtype,
00599                      struct regcache *regcache,
00600                      gdb_byte *readbuf, const gdb_byte *writebuf)
00601 {
00602   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
00603   LONGEST valtype_len = TYPE_LENGTH (valtype);
00604   int code_model = gdbarch_tdep (gdbarch)->code_model;
00605 
00606   if (TYPE_LENGTH (valtype) > 8
00607       || TYPE_CODE (valtype) == TYPE_CODE_STRUCT
00608       || TYPE_CODE (valtype) == TYPE_CODE_UNION)
00609     return RETURN_VALUE_STRUCT_CONVENTION;
00610 
00611   if (readbuf)
00612     {
00613       ULONGEST u;
00614       int argreg = MSP430_R12_REGNUM;
00615       int offset = 0;
00616 
00617       while (valtype_len > 0)
00618         {
00619           int size = 2;
00620 
00621           if (code_model == MSP_LARGE_CODE_MODEL
00622               && TYPE_CODE (valtype) == TYPE_CODE_PTR)
00623             {
00624               size = 4;
00625             }
00626 
00627           regcache_cooked_read_unsigned (regcache, argreg, &u);
00628           store_unsigned_integer (readbuf + offset, size, byte_order, u);
00629           valtype_len -= size;
00630           offset += size;
00631           argreg++;
00632         }
00633     }
00634 
00635   if (writebuf)
00636     {
00637       ULONGEST u;
00638       int argreg = MSP430_R12_REGNUM;
00639       int offset = 0;
00640 
00641       while (valtype_len > 0)
00642         {
00643           int size = 2;
00644 
00645           if (code_model == MSP_LARGE_CODE_MODEL
00646               && TYPE_CODE (valtype) == TYPE_CODE_PTR)
00647             {
00648               size = 4;
00649             }
00650 
00651           u = extract_unsigned_integer (writebuf + offset, size, byte_order);
00652           regcache_cooked_write_unsigned (regcache, argreg, u);
00653           valtype_len -= size;
00654           offset += size;
00655           argreg++;
00656         }
00657     }
00658 
00659   return RETURN_VALUE_REGISTER_CONVENTION;
00660 }
00661 
00662 
00663 /* Implement the "frame_align" gdbarch method.  */
00664 
00665 static CORE_ADDR
00666 msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
00667 {
00668   return align_down (sp, 2);
00669 }
00670 
00671 
00672 /* Implement the "dummy_id" gdbarch method.  */
00673 
00674 static struct frame_id
00675 msp430_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
00676 {
00677   return
00678     frame_id_build (get_frame_register_unsigned
00679                     (this_frame, MSP430_SP_REGNUM),
00680                     get_frame_pc (this_frame));
00681 }
00682 
00683 
00684 /* Implement the "push_dummy_call" gdbarch method.  */
00685 
00686 static CORE_ADDR
00687 msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
00688                         struct regcache *regcache, CORE_ADDR bp_addr,
00689                         int nargs, struct value **args, CORE_ADDR sp,
00690                         int struct_return, CORE_ADDR struct_addr)
00691 {
00692   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
00693   int write_pass;
00694   int sp_off = 0;
00695   CORE_ADDR cfa;
00696   int code_model = gdbarch_tdep (gdbarch)->code_model;
00697 
00698   struct type *func_type = value_type (function);
00699 
00700   /* Dereference function pointer types.  */
00701   while (TYPE_CODE (func_type) == TYPE_CODE_PTR)
00702     func_type = TYPE_TARGET_TYPE (func_type);
00703 
00704   /* The end result had better be a function or a method.  */
00705   gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
00706               || TYPE_CODE (func_type) == TYPE_CODE_METHOD);
00707 
00708   /* We make two passes; the first does the stack allocation,
00709      the second actually stores the arguments.  */
00710   for (write_pass = 0; write_pass <= 1; write_pass++)
00711     {
00712       int i;
00713       int arg_reg = MSP430_R12_REGNUM;
00714       int args_on_stack = 0;
00715 
00716       if (write_pass)
00717         sp = align_down (sp - sp_off, 4);
00718       sp_off = 0;
00719 
00720       if (struct_return)
00721         {
00722           if (write_pass)
00723             regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr);
00724           arg_reg++;
00725         }
00726 
00727       /* Push the arguments.  */
00728       for (i = 0; i < nargs; i++)
00729         {
00730           struct value *arg = args[i];
00731           const gdb_byte *arg_bits = value_contents_all (arg);
00732           struct type *arg_type = check_typedef (value_type (arg));
00733           ULONGEST arg_size = TYPE_LENGTH (arg_type);
00734           int offset;
00735           int current_arg_on_stack;
00736 
00737           current_arg_on_stack = 0;
00738 
00739           if (TYPE_CODE (arg_type) == TYPE_CODE_STRUCT
00740               || TYPE_CODE (arg_type) == TYPE_CODE_UNION)
00741             {
00742               /* Aggregates of any size are passed by reference.  */
00743               gdb_byte struct_addr[4];
00744 
00745               store_unsigned_integer (struct_addr, 4, byte_order,
00746                                       value_address (arg));
00747               arg_bits = struct_addr;
00748               arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2;
00749             }
00750           else
00751             {
00752               /* Scalars bigger than 8 bytes such as complex doubles are passed
00753                  on the stack.  */
00754               if (arg_size > 8)
00755                 current_arg_on_stack = 1;
00756             }
00757 
00758 
00759           for (offset = 0; offset < arg_size; offset += 2)
00760             {
00761               /* The condition below prevents 8 byte scalars from being split
00762                  between registers and memory (stack).  It also prevents other
00763                  splits once the stack has been written to.  */
00764               if (!current_arg_on_stack
00765                   && (arg_reg
00766                       + ((arg_size == 8 || args_on_stack)
00767                          ? ((arg_size - offset) / 2 - 1)
00768                          : 0) <= MSP430_R15_REGNUM))
00769                 {
00770                   int size = 2;
00771 
00772                   if (code_model == MSP_LARGE_CODE_MODEL
00773                       && TYPE_CODE (arg_type) == TYPE_CODE_PTR)
00774                     {
00775                       /* Pointer arguments using large memory model are passed
00776                          using entire register.  */
00777                       if (offset != 0)
00778                         continue;
00779                       size = 4;
00780                     }
00781 
00782                   if (write_pass)
00783                     regcache_cooked_write_unsigned (regcache, arg_reg,
00784                                                     extract_unsigned_integer
00785                                                     (arg_bits + offset, size,
00786                                                      byte_order));
00787 
00788                   arg_reg++;
00789                 }
00790               else
00791                 {
00792                   if (write_pass)
00793                     write_memory (sp + sp_off, arg_bits + offset, 2);
00794 
00795                   sp_off += 2;
00796                   args_on_stack = 1;
00797                   current_arg_on_stack = 1;
00798                 }
00799             }
00800         }
00801     }
00802 
00803   /* Keep track of the stack address prior to pushing the return address.
00804      This is the value that we'll return.  */
00805   cfa = sp;
00806 
00807   /* Push the return address.  */
00808   {
00809     int sz = (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL)
00810       ? 2 : 4;
00811     sp = sp - sz;
00812     write_memory_unsigned_integer (sp, sz, byte_order, bp_addr);
00813   }
00814 
00815   /* Update the stack pointer.  */
00816   regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp);
00817 
00818   return cfa;
00819 }
00820 
00821 /* In order to keep code size small, the compiler may create epilogue
00822    code through which more than one function epilogue is routed.  I.e.
00823    the epilogue and return may just be a branch to some common piece of
00824    code which is responsible for tearing down the frame and performing
00825    the return.  These epilog (label) names will have the common prefix
00826    defined here.  */
00827 
00828 static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_";
00829 
00830 /* Implement the "in_return_stub" gdbarch method.  */
00831 
00832 static int
00833 msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
00834                        const char *name)
00835 {
00836   return (name != NULL
00837           && strncmp (msp430_epilog_name_prefix, name,
00838                       strlen (msp430_epilog_name_prefix)) == 0);
00839 }
00840 
00841 /* Implement the "skip_trampoline_code" gdbarch method.  */
00842 static CORE_ADDR
00843 msp430_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
00844 {
00845   struct bound_minimal_symbol bms;
00846   const char *stub_name;
00847   struct gdbarch *gdbarch = get_frame_arch (frame);
00848 
00849   bms = lookup_minimal_symbol_by_pc (pc);
00850   if (!bms.minsym)
00851     return pc;
00852 
00853   stub_name = SYMBOL_LINKAGE_NAME (bms.minsym);
00854 
00855   if (gdbarch_tdep (gdbarch)->code_model == MSP_SMALL_CODE_MODEL
00856       && msp430_in_return_stub (gdbarch, pc, stub_name))
00857     {
00858       CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM);
00859 
00860       return read_memory_integer
00861         (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'),
00862          2, gdbarch_byte_order (gdbarch));
00863     }
00864 
00865   return pc;
00866 }
00867 
00868 /* Allocate and initialize a gdbarch object.  */
00869 
00870 static struct gdbarch *
00871 msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
00872 {
00873   struct gdbarch *gdbarch;
00874   struct gdbarch_tdep *tdep;
00875   int elf_flags, isa, code_model;
00876 
00877   /* Extract the elf_flags if available.  */
00878   if (info.abfd != NULL
00879       && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
00880     elf_flags = elf_elfheader (info.abfd)->e_flags;
00881   else
00882     elf_flags = 0;
00883 
00884   if (info.abfd != NULL)
00885     switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
00886                                       OFBA_MSPABI_Tag_ISA))
00887       {
00888       case 1:
00889         isa = MSP_ISA_MSP430;
00890         code_model = MSP_SMALL_CODE_MODEL;
00891         break;
00892       case 2:
00893         isa = MSP_ISA_MSP430X;
00894         switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
00895                                           OFBA_MSPABI_Tag_Code_Model))
00896           {
00897           case 1:
00898             code_model = MSP_SMALL_CODE_MODEL;
00899             break;
00900           case 2:
00901             code_model = MSP_LARGE_CODE_MODEL;
00902             break;
00903           default:
00904             internal_error (__FILE__, __LINE__,
00905                             _("Unknown msp430x code memory model"));
00906             break;
00907           }
00908         break;
00909       case 0:
00910         /* This can happen when loading a previously dumped data structure.
00911            Use the ISA and code model from the current architecture, provided
00912            it's compatible.  */
00913         {
00914           struct gdbarch *ca = get_current_arch ();
00915           if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430)
00916             {
00917               struct gdbarch_tdep *ca_tdep = gdbarch_tdep (ca);
00918 
00919               elf_flags = ca_tdep->elf_flags;
00920               isa = ca_tdep->isa;
00921               code_model = ca_tdep->code_model;
00922               break;
00923             }
00924           /* Otherwise, fall through...  */
00925         }
00926       default:
00927         error (_("Unknown msp430 isa"));
00928         break;
00929       }
00930   else
00931     {
00932       isa = MSP_ISA_MSP430;
00933       code_model = MSP_SMALL_CODE_MODEL;
00934     }
00935 
00936 
00937   /* Try to find the architecture in the list of already defined
00938      architectures.  */
00939   for (arches = gdbarch_list_lookup_by_info (arches, &info);
00940        arches != NULL;
00941        arches = gdbarch_list_lookup_by_info (arches->next, &info))
00942     {
00943       struct gdbarch_tdep *candidate_tdep = gdbarch_tdep (arches->gdbarch);
00944 
00945       if (candidate_tdep->elf_flags != elf_flags
00946           || candidate_tdep->isa != isa
00947           || candidate_tdep->code_model != code_model)
00948         continue;
00949 
00950       return arches->gdbarch;
00951     }
00952 
00953   /* None found, create a new architecture from the information
00954      provided.  */
00955   tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
00956   gdbarch = gdbarch_alloc (&info, tdep);
00957   tdep->elf_flags = elf_flags;
00958   tdep->isa = isa;
00959   tdep->code_model = code_model;
00960 
00961   /* Registers.  */
00962   set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS);
00963   set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS);
00964   set_gdbarch_register_name (gdbarch, msp430_register_name);
00965   if (isa == MSP_ISA_MSP430)
00966     set_gdbarch_register_type (gdbarch, msp430_register_type);
00967   else
00968     set_gdbarch_register_type (gdbarch, msp430x_register_type);
00969   set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM);
00970   set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM);
00971   set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p);
00972   set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read);
00973   set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write);
00974   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum);
00975   set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno);
00976 
00977   /* Data types.  */
00978   set_gdbarch_char_signed (gdbarch, 0);
00979   set_gdbarch_short_bit (gdbarch, 16);
00980   set_gdbarch_int_bit (gdbarch, 16);
00981   set_gdbarch_long_bit (gdbarch, 32);
00982   set_gdbarch_long_long_bit (gdbarch, 64);
00983   if (code_model == MSP_SMALL_CODE_MODEL)
00984     {
00985       set_gdbarch_ptr_bit (gdbarch, 16);
00986       set_gdbarch_addr_bit (gdbarch, 16);
00987     }
00988   else                          /* MSP_LARGE_CODE_MODEL */
00989     {
00990       set_gdbarch_ptr_bit (gdbarch, 32);
00991       set_gdbarch_addr_bit (gdbarch, 32);
00992     }
00993   set_gdbarch_dwarf2_addr_size (gdbarch, 4);
00994   set_gdbarch_float_bit (gdbarch, 32);
00995   set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
00996   set_gdbarch_double_bit (gdbarch, 64);
00997   set_gdbarch_long_double_bit (gdbarch, 64);
00998   set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
00999   set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
01000 
01001   /* Breakpoints.  */
01002   set_gdbarch_breakpoint_from_pc (gdbarch, msp430_breakpoint_from_pc);
01003   set_gdbarch_decr_pc_after_break (gdbarch, 1);
01004 
01005   /* Disassembly.  */
01006   set_gdbarch_print_insn (gdbarch, print_insn_msp430);
01007 
01008   /* Frames, prologues, etc.  */
01009   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
01010   set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
01011   set_gdbarch_unwind_pc (gdbarch, msp430_unwind_pc);
01012   set_gdbarch_unwind_sp (gdbarch, msp430_unwind_sp);
01013   set_gdbarch_frame_align (gdbarch, msp430_frame_align);
01014   dwarf2_append_unwinders (gdbarch);
01015   frame_unwind_append_unwinder (gdbarch, &msp430_unwind);
01016 
01017   /* Dummy frames, return values.  */
01018   set_gdbarch_dummy_id (gdbarch, msp430_dummy_id);
01019   set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call);
01020   set_gdbarch_return_value (gdbarch, msp430_return_value);
01021 
01022   /* Trampolines.  */
01023   set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub);
01024   set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code);
01025 
01026   /* Virtual tables.  */
01027   set_gdbarch_vbit_in_delta (gdbarch, 0);
01028 
01029   return gdbarch;
01030 }
01031 
01032 /* -Wmissing-prototypes */
01033 extern initialize_file_ftype _initialize_msp430_tdep;
01034 
01035 /* Register the initialization routine.  */
01036 
01037 void
01038 _initialize_msp430_tdep (void)
01039 {
01040   register_gdbarch_init (bfd_arch_msp430, msp430_gdbarch_init);
01041 }
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Defines