GDB (API)
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00001 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. 00002 00003 Copyright (C) 1996-2013 Free Software Foundation, Inc. 00004 00005 This file is part of GDB. 00006 00007 This program is free software; you can redistribute it and/or modify 00008 it under the terms of the GNU General Public License as published by 00009 the Free Software Foundation; either version 3 of the License, or 00010 (at your option) any later version. 00011 00012 This program is distributed in the hope that it will be useful, 00013 but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00015 GNU General Public License for more details. 00016 00017 You should have received a copy of the GNU General Public License 00018 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 00019 00020 #include "defs.h" 00021 #include "arch-utils.h" 00022 #include "dis-asm.h" 00023 #include "gdbtypes.h" 00024 #include "regcache.h" 00025 #include "gdb_string.h" 00026 #include "gdb_assert.h" 00027 #include "gdbcore.h" /* For write_memory_unsigned_integer. */ 00028 #include "value.h" 00029 #include "gdbtypes.h" 00030 #include "frame.h" 00031 #include "frame-unwind.h" 00032 #include "frame-base.h" 00033 #include "symtab.h" 00034 #include "dwarf2-frame.h" 00035 #include "osabi.h" 00036 #include "infcall.h" 00037 #include "prologue-value.h" 00038 #include "target.h" 00039 00040 #include "mn10300-tdep.h" 00041 00042 00043 /* The am33-2 has 64 registers. */ 00044 #define MN10300_MAX_NUM_REGS 64 00045 00046 /* This structure holds the results of a prologue analysis. */ 00047 struct mn10300_prologue 00048 { 00049 /* The architecture for which we generated this prologue info. */ 00050 struct gdbarch *gdbarch; 00051 00052 /* The offset from the frame base to the stack pointer --- always 00053 zero or negative. 00054 00055 Calling this a "size" is a bit misleading, but given that the 00056 stack grows downwards, using offsets for everything keeps one 00057 from going completely sign-crazy: you never change anything's 00058 sign for an ADD instruction; always change the second operand's 00059 sign for a SUB instruction; and everything takes care of 00060 itself. */ 00061 int frame_size; 00062 00063 /* Non-zero if this function has initialized the frame pointer from 00064 the stack pointer, zero otherwise. */ 00065 int has_frame_ptr; 00066 00067 /* If has_frame_ptr is non-zero, this is the offset from the frame 00068 base to where the frame pointer points. This is always zero or 00069 negative. */ 00070 int frame_ptr_offset; 00071 00072 /* The address of the first instruction at which the frame has been 00073 set up and the arguments are where the debug info says they are 00074 --- as best as we can tell. */ 00075 CORE_ADDR prologue_end; 00076 00077 /* reg_offset[R] is the offset from the CFA at which register R is 00078 saved, or 1 if register R has not been saved. (Real values are 00079 always zero or negative.) */ 00080 int reg_offset[MN10300_MAX_NUM_REGS]; 00081 }; 00082 00083 00084 /* Compute the alignment required by a type. */ 00085 00086 static int 00087 mn10300_type_align (struct type *type) 00088 { 00089 int i, align = 1; 00090 00091 switch (TYPE_CODE (type)) 00092 { 00093 case TYPE_CODE_INT: 00094 case TYPE_CODE_ENUM: 00095 case TYPE_CODE_SET: 00096 case TYPE_CODE_RANGE: 00097 case TYPE_CODE_CHAR: 00098 case TYPE_CODE_BOOL: 00099 case TYPE_CODE_FLT: 00100 case TYPE_CODE_PTR: 00101 case TYPE_CODE_REF: 00102 return TYPE_LENGTH (type); 00103 00104 case TYPE_CODE_COMPLEX: 00105 return TYPE_LENGTH (type) / 2; 00106 00107 case TYPE_CODE_STRUCT: 00108 case TYPE_CODE_UNION: 00109 for (i = 0; i < TYPE_NFIELDS (type); i++) 00110 { 00111 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); 00112 while (align < falign) 00113 align <<= 1; 00114 } 00115 return align; 00116 00117 case TYPE_CODE_ARRAY: 00118 /* HACK! Structures containing arrays, even small ones, are not 00119 elligible for returning in registers. */ 00120 return 256; 00121 00122 case TYPE_CODE_TYPEDEF: 00123 return mn10300_type_align (check_typedef (type)); 00124 00125 default: 00126 internal_error (__FILE__, __LINE__, _("bad switch")); 00127 } 00128 } 00129 00130 /* Should call_function allocate stack space for a struct return? */ 00131 static int 00132 mn10300_use_struct_convention (struct type *type) 00133 { 00134 /* Structures bigger than a pair of words can't be returned in 00135 registers. */ 00136 if (TYPE_LENGTH (type) > 8) 00137 return 1; 00138 00139 switch (TYPE_CODE (type)) 00140 { 00141 case TYPE_CODE_STRUCT: 00142 case TYPE_CODE_UNION: 00143 /* Structures with a single field are handled as the field 00144 itself. */ 00145 if (TYPE_NFIELDS (type) == 1) 00146 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); 00147 00148 /* Structures with word or double-word size are passed in memory, as 00149 long as they require at least word alignment. */ 00150 if (mn10300_type_align (type) >= 4) 00151 return 0; 00152 00153 return 1; 00154 00155 /* Arrays are addressable, so they're never returned in 00156 registers. This condition can only hold when the array is 00157 the only field of a struct or union. */ 00158 case TYPE_CODE_ARRAY: 00159 return 1; 00160 00161 case TYPE_CODE_TYPEDEF: 00162 return mn10300_use_struct_convention (check_typedef (type)); 00163 00164 default: 00165 return 0; 00166 } 00167 } 00168 00169 static void 00170 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, 00171 struct regcache *regcache, const gdb_byte *valbuf) 00172 { 00173 int len = TYPE_LENGTH (type); 00174 int reg, regsz; 00175 00176 if (TYPE_CODE (type) == TYPE_CODE_PTR) 00177 reg = 4; 00178 else 00179 reg = 0; 00180 00181 regsz = register_size (gdbarch, reg); 00182 00183 if (len <= regsz) 00184 regcache_raw_write_part (regcache, reg, 0, len, valbuf); 00185 else if (len <= 2 * regsz) 00186 { 00187 regcache_raw_write (regcache, reg, valbuf); 00188 gdb_assert (regsz == register_size (gdbarch, reg + 1)); 00189 regcache_raw_write_part (regcache, reg+1, 0, 00190 len - regsz, valbuf + regsz); 00191 } 00192 else 00193 internal_error (__FILE__, __LINE__, 00194 _("Cannot store return value %d bytes long."), len); 00195 } 00196 00197 static void 00198 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, 00199 struct regcache *regcache, void *valbuf) 00200 { 00201 gdb_byte buf[MAX_REGISTER_SIZE]; 00202 int len = TYPE_LENGTH (type); 00203 int reg, regsz; 00204 00205 if (TYPE_CODE (type) == TYPE_CODE_PTR) 00206 reg = 4; 00207 else 00208 reg = 0; 00209 00210 regsz = register_size (gdbarch, reg); 00211 if (len <= regsz) 00212 { 00213 regcache_raw_read (regcache, reg, buf); 00214 memcpy (valbuf, buf, len); 00215 } 00216 else if (len <= 2 * regsz) 00217 { 00218 regcache_raw_read (regcache, reg, buf); 00219 memcpy (valbuf, buf, regsz); 00220 gdb_assert (regsz == register_size (gdbarch, reg + 1)); 00221 regcache_raw_read (regcache, reg + 1, buf); 00222 memcpy ((char *) valbuf + regsz, buf, len - regsz); 00223 } 00224 else 00225 internal_error (__FILE__, __LINE__, 00226 _("Cannot extract return value %d bytes long."), len); 00227 } 00228 00229 /* Determine, for architecture GDBARCH, how a return value of TYPE 00230 should be returned. If it is supposed to be returned in registers, 00231 and READBUF is non-zero, read the appropriate value from REGCACHE, 00232 and copy it into READBUF. If WRITEBUF is non-zero, write the value 00233 from WRITEBUF into REGCACHE. */ 00234 00235 static enum return_value_convention 00236 mn10300_return_value (struct gdbarch *gdbarch, struct value *function, 00237 struct type *type, struct regcache *regcache, 00238 gdb_byte *readbuf, const gdb_byte *writebuf) 00239 { 00240 if (mn10300_use_struct_convention (type)) 00241 return RETURN_VALUE_STRUCT_CONVENTION; 00242 00243 if (readbuf) 00244 mn10300_extract_return_value (gdbarch, type, regcache, readbuf); 00245 if (writebuf) 00246 mn10300_store_return_value (gdbarch, type, regcache, writebuf); 00247 00248 return RETURN_VALUE_REGISTER_CONVENTION; 00249 } 00250 00251 static char * 00252 register_name (int reg, char **regs, long sizeof_regs) 00253 { 00254 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) 00255 return NULL; 00256 else 00257 return regs[reg]; 00258 } 00259 00260 static const char * 00261 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) 00262 { 00263 static char *regs[] = 00264 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", 00265 "sp", "pc", "mdr", "psw", "lir", "lar", "", "", 00266 "", "", "", "", "", "", "", "", 00267 "", "", "", "", "", "", "", "fp" 00268 }; 00269 return register_name (reg, regs, sizeof regs); 00270 } 00271 00272 00273 static const char * 00274 am33_register_name (struct gdbarch *gdbarch, int reg) 00275 { 00276 static char *regs[] = 00277 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", 00278 "sp", "pc", "mdr", "psw", "lir", "lar", "", 00279 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 00280 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" 00281 }; 00282 return register_name (reg, regs, sizeof regs); 00283 } 00284 00285 static const char * 00286 am33_2_register_name (struct gdbarch *gdbarch, int reg) 00287 { 00288 static char *regs[] = 00289 { 00290 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", 00291 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", 00292 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", 00293 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", 00294 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", 00295 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", 00296 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", 00297 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" 00298 }; 00299 return register_name (reg, regs, sizeof regs); 00300 } 00301 00302 static struct type * 00303 mn10300_register_type (struct gdbarch *gdbarch, int reg) 00304 { 00305 return builtin_type (gdbarch)->builtin_int; 00306 } 00307 00308 static CORE_ADDR 00309 mn10300_read_pc (struct regcache *regcache) 00310 { 00311 ULONGEST val; 00312 regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); 00313 return val; 00314 } 00315 00316 static void 00317 mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) 00318 { 00319 regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); 00320 } 00321 00322 /* The breakpoint instruction must be the same size as the smallest 00323 instruction in the instruction set. 00324 00325 The Matsushita mn10x00 processors have single byte instructions 00326 so we need a single byte breakpoint. Matsushita hasn't defined 00327 one, so we defined it ourselves. */ 00328 00329 static const unsigned char * 00330 mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, 00331 int *bp_size) 00332 { 00333 static gdb_byte breakpoint[] = {0xff}; 00334 *bp_size = 1; 00335 return breakpoint; 00336 } 00337 00338 /* Model the semantics of pushing a register onto the stack. This 00339 is a helper function for mn10300_analyze_prologue, below. */ 00340 static void 00341 push_reg (pv_t *regs, struct pv_area *stack, int regnum) 00342 { 00343 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); 00344 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]); 00345 } 00346 00347 /* Translate an "r" register number extracted from an instruction encoding 00348 into a GDB register number. Adapted from a simulator function 00349 of the same name; see am33.igen. */ 00350 static int 00351 translate_rreg (int rreg) 00352 { 00353 /* The higher register numbers actually correspond to the 00354 basic machine's address and data registers. */ 00355 if (rreg > 7 && rreg < 12) 00356 return E_A0_REGNUM + rreg - 8; 00357 else if (rreg > 11 && rreg < 16) 00358 return E_D0_REGNUM + rreg - 12; 00359 else 00360 return E_E0_REGNUM + rreg; 00361 } 00362 00363 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan. 00364 00365 If VALUE is a saved register, ADDR says it was saved at a constant 00366 offset from the frame base, and SIZE indicates that the whole 00367 register was saved, record its offset in RESULT_UNTYPED. */ 00368 static void 00369 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) 00370 { 00371 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped; 00372 00373 if (value.kind == pvk_register 00374 && value.k == 0 00375 && pv_is_register (addr, E_SP_REGNUM) 00376 && size == register_size (result->gdbarch, value.reg)) 00377 result->reg_offset[value.reg] = addr.k; 00378 } 00379 00380 /* Analyze the prologue to determine where registers are saved, 00381 the end of the prologue, etc. The result of this analysis is 00382 returned in RESULT. See struct mn10300_prologue above for more 00383 information. */ 00384 static void 00385 mn10300_analyze_prologue (struct gdbarch *gdbarch, 00386 CORE_ADDR start_pc, CORE_ADDR limit_pc, 00387 struct mn10300_prologue *result) 00388 { 00389 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00390 CORE_ADDR pc; 00391 int rn; 00392 pv_t regs[MN10300_MAX_NUM_REGS]; 00393 struct pv_area *stack; 00394 struct cleanup *back_to; 00395 CORE_ADDR after_last_frame_setup_insn = start_pc; 00396 int am33_mode = AM33_MODE (gdbarch); 00397 00398 memset (result, 0, sizeof (*result)); 00399 result->gdbarch = gdbarch; 00400 00401 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++) 00402 { 00403 regs[rn] = pv_register (rn, 0); 00404 result->reg_offset[rn] = 1; 00405 } 00406 stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch)); 00407 back_to = make_cleanup_free_pv_area (stack); 00408 00409 /* The typical call instruction will have saved the return address on the 00410 stack. Space for the return address has already been preallocated in 00411 the caller's frame. It's possible, such as when using -mrelax with gcc 00412 that other registers were saved as well. If this happens, we really 00413 have no chance of deciphering the frame. DWARF info can save the day 00414 when this happens. */ 00415 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]); 00416 00417 pc = start_pc; 00418 while (pc < limit_pc) 00419 { 00420 int status; 00421 gdb_byte instr[2]; 00422 00423 /* Instructions can be as small as one byte; however, we usually 00424 need at least two bytes to do the decoding, so fetch that many 00425 to begin with. */ 00426 status = target_read_memory (pc, instr, 2); 00427 if (status != 0) 00428 break; 00429 00430 /* movm [regs], sp */ 00431 if (instr[0] == 0xcf) 00432 { 00433 gdb_byte save_mask; 00434 00435 save_mask = instr[1]; 00436 00437 if ((save_mask & movm_exreg0_bit) && am33_mode) 00438 { 00439 push_reg (regs, stack, E_E2_REGNUM); 00440 push_reg (regs, stack, E_E3_REGNUM); 00441 } 00442 if ((save_mask & movm_exreg1_bit) && am33_mode) 00443 { 00444 push_reg (regs, stack, E_E4_REGNUM); 00445 push_reg (regs, stack, E_E5_REGNUM); 00446 push_reg (regs, stack, E_E6_REGNUM); 00447 push_reg (regs, stack, E_E7_REGNUM); 00448 } 00449 if ((save_mask & movm_exother_bit) && am33_mode) 00450 { 00451 push_reg (regs, stack, E_E0_REGNUM); 00452 push_reg (regs, stack, E_E1_REGNUM); 00453 push_reg (regs, stack, E_MDRQ_REGNUM); 00454 push_reg (regs, stack, E_MCRH_REGNUM); 00455 push_reg (regs, stack, E_MCRL_REGNUM); 00456 push_reg (regs, stack, E_MCVF_REGNUM); 00457 } 00458 if (save_mask & movm_d2_bit) 00459 push_reg (regs, stack, E_D2_REGNUM); 00460 if (save_mask & movm_d3_bit) 00461 push_reg (regs, stack, E_D3_REGNUM); 00462 if (save_mask & movm_a2_bit) 00463 push_reg (regs, stack, E_A2_REGNUM); 00464 if (save_mask & movm_a3_bit) 00465 push_reg (regs, stack, E_A3_REGNUM); 00466 if (save_mask & movm_other_bit) 00467 { 00468 push_reg (regs, stack, E_D0_REGNUM); 00469 push_reg (regs, stack, E_D1_REGNUM); 00470 push_reg (regs, stack, E_A0_REGNUM); 00471 push_reg (regs, stack, E_A1_REGNUM); 00472 push_reg (regs, stack, E_MDR_REGNUM); 00473 push_reg (regs, stack, E_LIR_REGNUM); 00474 push_reg (regs, stack, E_LAR_REGNUM); 00475 /* The `other' bit leaves a blank area of four bytes at 00476 the beginning of its block of saved registers, making 00477 it 32 bytes long in total. */ 00478 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); 00479 } 00480 00481 pc += 2; 00482 after_last_frame_setup_insn = pc; 00483 } 00484 /* mov sp, aN */ 00485 else if ((instr[0] & 0xfc) == 0x3c) 00486 { 00487 int aN = instr[0] & 0x03; 00488 00489 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM]; 00490 00491 pc += 1; 00492 if (aN == 3) 00493 after_last_frame_setup_insn = pc; 00494 } 00495 /* mov aM, aN */ 00496 else if ((instr[0] & 0xf0) == 0x90 00497 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) 00498 { 00499 int aN = instr[0] & 0x03; 00500 int aM = (instr[0] & 0x0c) >> 2; 00501 00502 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM]; 00503 00504 pc += 1; 00505 } 00506 /* mov dM, dN */ 00507 else if ((instr[0] & 0xf0) == 0x80 00508 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) 00509 { 00510 int dN = instr[0] & 0x03; 00511 int dM = (instr[0] & 0x0c) >> 2; 00512 00513 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM]; 00514 00515 pc += 1; 00516 } 00517 /* mov aM, dN */ 00518 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0) 00519 { 00520 int dN = instr[1] & 0x03; 00521 int aM = (instr[1] & 0x0c) >> 2; 00522 00523 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM]; 00524 00525 pc += 2; 00526 } 00527 /* mov dM, aN */ 00528 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0) 00529 { 00530 int aN = instr[1] & 0x03; 00531 int dM = (instr[1] & 0x0c) >> 2; 00532 00533 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM]; 00534 00535 pc += 2; 00536 } 00537 /* add imm8, SP */ 00538 else if (instr[0] == 0xf8 && instr[1] == 0xfe) 00539 { 00540 gdb_byte buf[1]; 00541 LONGEST imm8; 00542 00543 00544 status = target_read_memory (pc + 2, buf, 1); 00545 if (status != 0) 00546 break; 00547 00548 imm8 = extract_signed_integer (buf, 1, byte_order); 00549 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8); 00550 00551 pc += 3; 00552 /* Stack pointer adjustments are frame related. */ 00553 after_last_frame_setup_insn = pc; 00554 } 00555 /* add imm16, SP */ 00556 else if (instr[0] == 0xfa && instr[1] == 0xfe) 00557 { 00558 gdb_byte buf[2]; 00559 LONGEST imm16; 00560 00561 status = target_read_memory (pc + 2, buf, 2); 00562 if (status != 0) 00563 break; 00564 00565 imm16 = extract_signed_integer (buf, 2, byte_order); 00566 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16); 00567 00568 pc += 4; 00569 /* Stack pointer adjustments are frame related. */ 00570 after_last_frame_setup_insn = pc; 00571 } 00572 /* add imm32, SP */ 00573 else if (instr[0] == 0xfc && instr[1] == 0xfe) 00574 { 00575 gdb_byte buf[4]; 00576 LONGEST imm32; 00577 00578 status = target_read_memory (pc + 2, buf, 4); 00579 if (status != 0) 00580 break; 00581 00582 00583 imm32 = extract_signed_integer (buf, 4, byte_order); 00584 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32); 00585 00586 pc += 6; 00587 /* Stack pointer adjustments are frame related. */ 00588 after_last_frame_setup_insn = pc; 00589 } 00590 /* add imm8, aN */ 00591 else if ((instr[0] & 0xfc) == 0x20) 00592 { 00593 int aN; 00594 LONGEST imm8; 00595 00596 aN = instr[0] & 0x03; 00597 imm8 = extract_signed_integer (&instr[1], 1, byte_order); 00598 00599 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], 00600 imm8); 00601 00602 pc += 2; 00603 } 00604 /* add imm16, aN */ 00605 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0) 00606 { 00607 int aN; 00608 LONGEST imm16; 00609 gdb_byte buf[2]; 00610 00611 aN = instr[1] & 0x03; 00612 00613 status = target_read_memory (pc + 2, buf, 2); 00614 if (status != 0) 00615 break; 00616 00617 00618 imm16 = extract_signed_integer (buf, 2, byte_order); 00619 00620 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], 00621 imm16); 00622 00623 pc += 4; 00624 } 00625 /* add imm32, aN */ 00626 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0) 00627 { 00628 int aN; 00629 LONGEST imm32; 00630 gdb_byte buf[4]; 00631 00632 aN = instr[1] & 0x03; 00633 00634 status = target_read_memory (pc + 2, buf, 4); 00635 if (status != 0) 00636 break; 00637 00638 imm32 = extract_signed_integer (buf, 2, byte_order); 00639 00640 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], 00641 imm32); 00642 pc += 6; 00643 } 00644 /* fmov fsM, (rN) */ 00645 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30) 00646 { 00647 int fsM, sM, Y, rN; 00648 gdb_byte buf[1]; 00649 00650 Y = (instr[1] & 0x02) >> 1; 00651 00652 status = target_read_memory (pc + 2, buf, 1); 00653 if (status != 0) 00654 break; 00655 00656 sM = (buf[0] & 0xf0) >> 4; 00657 rN = buf[0] & 0x0f; 00658 fsM = (Y << 4) | sM; 00659 00660 pv_area_store (stack, regs[translate_rreg (rN)], 4, 00661 regs[E_FS0_REGNUM + fsM]); 00662 00663 pc += 3; 00664 } 00665 /* fmov fsM, (sp) */ 00666 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34) 00667 { 00668 int fsM, sM, Y; 00669 gdb_byte buf[1]; 00670 00671 Y = (instr[1] & 0x02) >> 1; 00672 00673 status = target_read_memory (pc + 2, buf, 1); 00674 if (status != 0) 00675 break; 00676 00677 sM = (buf[0] & 0xf0) >> 4; 00678 fsM = (Y << 4) | sM; 00679 00680 pv_area_store (stack, regs[E_SP_REGNUM], 4, 00681 regs[E_FS0_REGNUM + fsM]); 00682 00683 pc += 3; 00684 } 00685 /* fmov fsM, (rN, rI) */ 00686 else if (instr[0] == 0xfb && instr[1] == 0x37) 00687 { 00688 int fsM, sM, Z, rN, rI; 00689 gdb_byte buf[2]; 00690 00691 00692 status = target_read_memory (pc + 2, buf, 2); 00693 if (status != 0) 00694 break; 00695 00696 rI = (buf[0] & 0xf0) >> 4; 00697 rN = buf[0] & 0x0f; 00698 sM = (buf[1] & 0xf0) >> 4; 00699 Z = (buf[1] & 0x02) >> 1; 00700 fsM = (Z << 4) | sM; 00701 00702 pv_area_store (stack, 00703 pv_add (regs[translate_rreg (rN)], 00704 regs[translate_rreg (rI)]), 00705 4, regs[E_FS0_REGNUM + fsM]); 00706 00707 pc += 4; 00708 } 00709 /* fmov fsM, (d8, rN) */ 00710 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30) 00711 { 00712 int fsM, sM, Y, rN; 00713 LONGEST d8; 00714 gdb_byte buf[2]; 00715 00716 Y = (instr[1] & 0x02) >> 1; 00717 00718 status = target_read_memory (pc + 2, buf, 2); 00719 if (status != 0) 00720 break; 00721 00722 sM = (buf[0] & 0xf0) >> 4; 00723 rN = buf[0] & 0x0f; 00724 fsM = (Y << 4) | sM; 00725 d8 = extract_signed_integer (&buf[1], 1, byte_order); 00726 00727 pv_area_store (stack, 00728 pv_add_constant (regs[translate_rreg (rN)], d8), 00729 4, regs[E_FS0_REGNUM + fsM]); 00730 00731 pc += 4; 00732 } 00733 /* fmov fsM, (d24, rN) */ 00734 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30) 00735 { 00736 int fsM, sM, Y, rN; 00737 LONGEST d24; 00738 gdb_byte buf[4]; 00739 00740 Y = (instr[1] & 0x02) >> 1; 00741 00742 status = target_read_memory (pc + 2, buf, 4); 00743 if (status != 0) 00744 break; 00745 00746 sM = (buf[0] & 0xf0) >> 4; 00747 rN = buf[0] & 0x0f; 00748 fsM = (Y << 4) | sM; 00749 d24 = extract_signed_integer (&buf[1], 3, byte_order); 00750 00751 pv_area_store (stack, 00752 pv_add_constant (regs[translate_rreg (rN)], d24), 00753 4, regs[E_FS0_REGNUM + fsM]); 00754 00755 pc += 6; 00756 } 00757 /* fmov fsM, (d32, rN) */ 00758 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30) 00759 { 00760 int fsM, sM, Y, rN; 00761 LONGEST d32; 00762 gdb_byte buf[5]; 00763 00764 Y = (instr[1] & 0x02) >> 1; 00765 00766 status = target_read_memory (pc + 2, buf, 5); 00767 if (status != 0) 00768 break; 00769 00770 sM = (buf[0] & 0xf0) >> 4; 00771 rN = buf[0] & 0x0f; 00772 fsM = (Y << 4) | sM; 00773 d32 = extract_signed_integer (&buf[1], 4, byte_order); 00774 00775 pv_area_store (stack, 00776 pv_add_constant (regs[translate_rreg (rN)], d32), 00777 4, regs[E_FS0_REGNUM + fsM]); 00778 00779 pc += 7; 00780 } 00781 /* fmov fsM, (d8, SP) */ 00782 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34) 00783 { 00784 int fsM, sM, Y; 00785 LONGEST d8; 00786 gdb_byte buf[2]; 00787 00788 Y = (instr[1] & 0x02) >> 1; 00789 00790 status = target_read_memory (pc + 2, buf, 2); 00791 if (status != 0) 00792 break; 00793 00794 sM = (buf[0] & 0xf0) >> 4; 00795 fsM = (Y << 4) | sM; 00796 d8 = extract_signed_integer (&buf[1], 1, byte_order); 00797 00798 pv_area_store (stack, 00799 pv_add_constant (regs[E_SP_REGNUM], d8), 00800 4, regs[E_FS0_REGNUM + fsM]); 00801 00802 pc += 4; 00803 } 00804 /* fmov fsM, (d24, SP) */ 00805 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34) 00806 { 00807 int fsM, sM, Y; 00808 LONGEST d24; 00809 gdb_byte buf[4]; 00810 00811 Y = (instr[1] & 0x02) >> 1; 00812 00813 status = target_read_memory (pc + 2, buf, 4); 00814 if (status != 0) 00815 break; 00816 00817 sM = (buf[0] & 0xf0) >> 4; 00818 fsM = (Y << 4) | sM; 00819 d24 = extract_signed_integer (&buf[1], 3, byte_order); 00820 00821 pv_area_store (stack, 00822 pv_add_constant (regs[E_SP_REGNUM], d24), 00823 4, regs[E_FS0_REGNUM + fsM]); 00824 00825 pc += 6; 00826 } 00827 /* fmov fsM, (d32, SP) */ 00828 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34) 00829 { 00830 int fsM, sM, Y; 00831 LONGEST d32; 00832 gdb_byte buf[5]; 00833 00834 Y = (instr[1] & 0x02) >> 1; 00835 00836 status = target_read_memory (pc + 2, buf, 5); 00837 if (status != 0) 00838 break; 00839 00840 sM = (buf[0] & 0xf0) >> 4; 00841 fsM = (Y << 4) | sM; 00842 d32 = extract_signed_integer (&buf[1], 4, byte_order); 00843 00844 pv_area_store (stack, 00845 pv_add_constant (regs[E_SP_REGNUM], d32), 00846 4, regs[E_FS0_REGNUM + fsM]); 00847 00848 pc += 7; 00849 } 00850 /* fmov fsM, (rN+) */ 00851 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31) 00852 { 00853 int fsM, sM, Y, rN, rN_regnum; 00854 gdb_byte buf[1]; 00855 00856 Y = (instr[1] & 0x02) >> 1; 00857 00858 status = target_read_memory (pc + 2, buf, 1); 00859 if (status != 0) 00860 break; 00861 00862 sM = (buf[0] & 0xf0) >> 4; 00863 rN = buf[0] & 0x0f; 00864 fsM = (Y << 4) | sM; 00865 00866 rN_regnum = translate_rreg (rN); 00867 00868 pv_area_store (stack, regs[rN_regnum], 4, 00869 regs[E_FS0_REGNUM + fsM]); 00870 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4); 00871 00872 pc += 3; 00873 } 00874 /* fmov fsM, (rN+, imm8) */ 00875 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31) 00876 { 00877 int fsM, sM, Y, rN, rN_regnum; 00878 LONGEST imm8; 00879 gdb_byte buf[2]; 00880 00881 Y = (instr[1] & 0x02) >> 1; 00882 00883 status = target_read_memory (pc + 2, buf, 2); 00884 if (status != 0) 00885 break; 00886 00887 sM = (buf[0] & 0xf0) >> 4; 00888 rN = buf[0] & 0x0f; 00889 fsM = (Y << 4) | sM; 00890 imm8 = extract_signed_integer (&buf[1], 1, byte_order); 00891 00892 rN_regnum = translate_rreg (rN); 00893 00894 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); 00895 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8); 00896 00897 pc += 4; 00898 } 00899 /* fmov fsM, (rN+, imm24) */ 00900 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31) 00901 { 00902 int fsM, sM, Y, rN, rN_regnum; 00903 LONGEST imm24; 00904 gdb_byte buf[4]; 00905 00906 Y = (instr[1] & 0x02) >> 1; 00907 00908 status = target_read_memory (pc + 2, buf, 4); 00909 if (status != 0) 00910 break; 00911 00912 sM = (buf[0] & 0xf0) >> 4; 00913 rN = buf[0] & 0x0f; 00914 fsM = (Y << 4) | sM; 00915 imm24 = extract_signed_integer (&buf[1], 3, byte_order); 00916 00917 rN_regnum = translate_rreg (rN); 00918 00919 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); 00920 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24); 00921 00922 pc += 6; 00923 } 00924 /* fmov fsM, (rN+, imm32) */ 00925 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31) 00926 { 00927 int fsM, sM, Y, rN, rN_regnum; 00928 LONGEST imm32; 00929 gdb_byte buf[5]; 00930 00931 Y = (instr[1] & 0x02) >> 1; 00932 00933 status = target_read_memory (pc + 2, buf, 5); 00934 if (status != 0) 00935 break; 00936 00937 sM = (buf[0] & 0xf0) >> 4; 00938 rN = buf[0] & 0x0f; 00939 fsM = (Y << 4) | sM; 00940 imm32 = extract_signed_integer (&buf[1], 4, byte_order); 00941 00942 rN_regnum = translate_rreg (rN); 00943 00944 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); 00945 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32); 00946 00947 pc += 7; 00948 } 00949 /* mov imm8, aN */ 00950 else if ((instr[0] & 0xf0) == 0x90) 00951 { 00952 int aN = instr[0] & 0x03; 00953 LONGEST imm8; 00954 00955 imm8 = extract_signed_integer (&instr[1], 1, byte_order); 00956 00957 regs[E_A0_REGNUM + aN] = pv_constant (imm8); 00958 pc += 2; 00959 } 00960 /* mov imm16, aN */ 00961 else if ((instr[0] & 0xfc) == 0x24) 00962 { 00963 int aN = instr[0] & 0x03; 00964 gdb_byte buf[2]; 00965 LONGEST imm16; 00966 00967 status = target_read_memory (pc + 1, buf, 2); 00968 if (status != 0) 00969 break; 00970 00971 imm16 = extract_signed_integer (buf, 2, byte_order); 00972 regs[E_A0_REGNUM + aN] = pv_constant (imm16); 00973 pc += 3; 00974 } 00975 /* mov imm32, aN */ 00976 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc)) 00977 { 00978 int aN = instr[1] & 0x03; 00979 gdb_byte buf[4]; 00980 LONGEST imm32; 00981 00982 status = target_read_memory (pc + 2, buf, 4); 00983 if (status != 0) 00984 break; 00985 00986 imm32 = extract_signed_integer (buf, 4, byte_order); 00987 regs[E_A0_REGNUM + aN] = pv_constant (imm32); 00988 pc += 6; 00989 } 00990 /* mov imm8, dN */ 00991 else if ((instr[0] & 0xf0) == 0x80) 00992 { 00993 int dN = instr[0] & 0x03; 00994 LONGEST imm8; 00995 00996 imm8 = extract_signed_integer (&instr[1], 1, byte_order); 00997 00998 regs[E_D0_REGNUM + dN] = pv_constant (imm8); 00999 pc += 2; 01000 } 01001 /* mov imm16, dN */ 01002 else if ((instr[0] & 0xfc) == 0x2c) 01003 { 01004 int dN = instr[0] & 0x03; 01005 gdb_byte buf[2]; 01006 LONGEST imm16; 01007 01008 status = target_read_memory (pc + 1, buf, 2); 01009 if (status != 0) 01010 break; 01011 01012 imm16 = extract_signed_integer (buf, 2, byte_order); 01013 regs[E_D0_REGNUM + dN] = pv_constant (imm16); 01014 pc += 3; 01015 } 01016 /* mov imm32, dN */ 01017 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc)) 01018 { 01019 int dN = instr[1] & 0x03; 01020 gdb_byte buf[4]; 01021 LONGEST imm32; 01022 01023 status = target_read_memory (pc + 2, buf, 4); 01024 if (status != 0) 01025 break; 01026 01027 imm32 = extract_signed_integer (buf, 4, byte_order); 01028 regs[E_D0_REGNUM + dN] = pv_constant (imm32); 01029 pc += 6; 01030 } 01031 else 01032 { 01033 /* We've hit some instruction that we don't recognize. Hopefully, 01034 we have enough to do prologue analysis. */ 01035 break; 01036 } 01037 } 01038 01039 /* Is the frame size (offset, really) a known constant? */ 01040 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM)) 01041 result->frame_size = regs[E_SP_REGNUM].k; 01042 01043 /* Was the frame pointer initialized? */ 01044 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM)) 01045 { 01046 result->has_frame_ptr = 1; 01047 result->frame_ptr_offset = regs[E_A3_REGNUM].k; 01048 } 01049 01050 /* Record where all the registers were saved. */ 01051 pv_area_scan (stack, check_for_saved, (void *) result); 01052 01053 result->prologue_end = after_last_frame_setup_insn; 01054 01055 do_cleanups (back_to); 01056 } 01057 01058 /* Function: skip_prologue 01059 Return the address of the first inst past the prologue of the function. */ 01060 01061 static CORE_ADDR 01062 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 01063 { 01064 const char *name; 01065 CORE_ADDR func_addr, func_end; 01066 struct mn10300_prologue p; 01067 01068 /* Try to find the extent of the function that contains PC. */ 01069 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) 01070 return pc; 01071 01072 mn10300_analyze_prologue (gdbarch, pc, func_end, &p); 01073 return p.prologue_end; 01074 } 01075 01076 /* Wrapper for mn10300_analyze_prologue: find the function start; 01077 use the current frame PC as the limit, then 01078 invoke mn10300_analyze_prologue and return its result. */ 01079 static struct mn10300_prologue * 01080 mn10300_analyze_frame_prologue (struct frame_info *this_frame, 01081 void **this_prologue_cache) 01082 { 01083 if (!*this_prologue_cache) 01084 { 01085 CORE_ADDR func_start, stop_addr; 01086 01087 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue); 01088 01089 func_start = get_frame_func (this_frame); 01090 stop_addr = get_frame_pc (this_frame); 01091 01092 /* If we couldn't find any function containing the PC, then 01093 just initialize the prologue cache, but don't do anything. */ 01094 if (!func_start) 01095 stop_addr = func_start; 01096 01097 mn10300_analyze_prologue (get_frame_arch (this_frame), 01098 func_start, stop_addr, *this_prologue_cache); 01099 } 01100 01101 return *this_prologue_cache; 01102 } 01103 01104 /* Given the next frame and a prologue cache, return this frame's 01105 base. */ 01106 static CORE_ADDR 01107 mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache) 01108 { 01109 struct mn10300_prologue *p 01110 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); 01111 01112 /* In functions that use alloca, the distance between the stack 01113 pointer and the frame base varies dynamically, so we can't use 01114 the SP plus static information like prologue analysis to find the 01115 frame base. However, such functions must have a frame pointer, 01116 to be able to restore the SP on exit. So whenever we do have a 01117 frame pointer, use that to find the base. */ 01118 if (p->has_frame_ptr) 01119 { 01120 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM); 01121 return fp - p->frame_ptr_offset; 01122 } 01123 else 01124 { 01125 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); 01126 return sp - p->frame_size; 01127 } 01128 } 01129 01130 /* Here is a dummy implementation. */ 01131 static struct frame_id 01132 mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) 01133 { 01134 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); 01135 CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); 01136 return frame_id_build (sp, pc); 01137 } 01138 01139 static void 01140 mn10300_frame_this_id (struct frame_info *this_frame, 01141 void **this_prologue_cache, 01142 struct frame_id *this_id) 01143 { 01144 *this_id = frame_id_build (mn10300_frame_base (this_frame, 01145 this_prologue_cache), 01146 get_frame_func (this_frame)); 01147 01148 } 01149 01150 static struct value * 01151 mn10300_frame_prev_register (struct frame_info *this_frame, 01152 void **this_prologue_cache, int regnum) 01153 { 01154 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame)); 01155 struct mn10300_prologue *p 01156 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); 01157 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache); 01158 int reg_size = register_size (get_frame_arch (this_frame), regnum); 01159 01160 if (regnum == E_SP_REGNUM) 01161 return frame_unwind_got_constant (this_frame, regnum, frame_base); 01162 01163 /* If prologue analysis says we saved this register somewhere, 01164 return a description of the stack slot holding it. */ 01165 if (p->reg_offset[regnum] != 1) 01166 return frame_unwind_got_memory (this_frame, regnum, 01167 frame_base + p->reg_offset[regnum]); 01168 01169 /* Otherwise, presume we haven't changed the value of this 01170 register, and get it from the next frame. */ 01171 return frame_unwind_got_register (this_frame, regnum, regnum); 01172 } 01173 01174 static const struct frame_unwind mn10300_frame_unwind = { 01175 NORMAL_FRAME, 01176 default_frame_unwind_stop_reason, 01177 mn10300_frame_this_id, 01178 mn10300_frame_prev_register, 01179 NULL, 01180 default_frame_sniffer 01181 }; 01182 01183 static CORE_ADDR 01184 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) 01185 { 01186 ULONGEST pc; 01187 01188 pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM); 01189 return pc; 01190 } 01191 01192 static CORE_ADDR 01193 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) 01194 { 01195 ULONGEST sp; 01196 01197 sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM); 01198 return sp; 01199 } 01200 01201 static void 01202 mn10300_frame_unwind_init (struct gdbarch *gdbarch) 01203 { 01204 dwarf2_append_unwinders (gdbarch); 01205 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); 01206 set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id); 01207 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); 01208 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); 01209 } 01210 01211 /* Function: push_dummy_call 01212 * 01213 * Set up machine state for a target call, including 01214 * function arguments, stack, return address, etc. 01215 * 01216 */ 01217 01218 static CORE_ADDR 01219 mn10300_push_dummy_call (struct gdbarch *gdbarch, 01220 struct value *target_func, 01221 struct regcache *regcache, 01222 CORE_ADDR bp_addr, 01223 int nargs, struct value **args, 01224 CORE_ADDR sp, 01225 int struct_return, 01226 CORE_ADDR struct_addr) 01227 { 01228 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 01229 const int push_size = register_size (gdbarch, E_PC_REGNUM); 01230 int regs_used; 01231 int len, arg_len; 01232 int stack_offset = 0; 01233 int argnum; 01234 const gdb_byte *val; 01235 gdb_byte valbuf[MAX_REGISTER_SIZE]; 01236 01237 /* This should be a nop, but align the stack just in case something 01238 went wrong. Stacks are four byte aligned on the mn10300. */ 01239 sp &= ~3; 01240 01241 /* Now make space on the stack for the args. 01242 01243 XXX This doesn't appear to handle pass-by-invisible reference 01244 arguments. */ 01245 regs_used = struct_return ? 1 : 0; 01246 for (len = 0, argnum = 0; argnum < nargs; argnum++) 01247 { 01248 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; 01249 while (regs_used < 2 && arg_len > 0) 01250 { 01251 regs_used++; 01252 arg_len -= push_size; 01253 } 01254 len += arg_len; 01255 } 01256 01257 /* Allocate stack space. */ 01258 sp -= len; 01259 01260 if (struct_return) 01261 { 01262 regs_used = 1; 01263 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); 01264 } 01265 else 01266 regs_used = 0; 01267 01268 /* Push all arguments onto the stack. */ 01269 for (argnum = 0; argnum < nargs; argnum++) 01270 { 01271 /* FIXME what about structs? Unions? */ 01272 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT 01273 && TYPE_LENGTH (value_type (*args)) > 8) 01274 { 01275 /* Change to pointer-to-type. */ 01276 arg_len = push_size; 01277 store_unsigned_integer (valbuf, push_size, byte_order, 01278 value_address (*args)); 01279 val = &valbuf[0]; 01280 } 01281 else 01282 { 01283 arg_len = TYPE_LENGTH (value_type (*args)); 01284 val = value_contents (*args); 01285 } 01286 01287 while (regs_used < 2 && arg_len > 0) 01288 { 01289 regcache_cooked_write_unsigned (regcache, regs_used, 01290 extract_unsigned_integer (val, push_size, byte_order)); 01291 val += push_size; 01292 arg_len -= push_size; 01293 regs_used++; 01294 } 01295 01296 while (arg_len > 0) 01297 { 01298 write_memory (sp + stack_offset, val, push_size); 01299 arg_len -= push_size; 01300 val += push_size; 01301 stack_offset += push_size; 01302 } 01303 01304 args++; 01305 } 01306 01307 /* Make space for the flushback area. */ 01308 sp -= 8; 01309 01310 /* Push the return address that contains the magic breakpoint. */ 01311 sp -= 4; 01312 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr); 01313 01314 /* The CPU also writes the return address always into the 01315 MDR register on "call". */ 01316 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); 01317 01318 /* Update $sp. */ 01319 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); 01320 01321 /* On the mn10300, it's possible to move some of the stack adjustment 01322 and saving of the caller-save registers out of the prologue and 01323 into the call sites. (When using gcc, this optimization can 01324 occur when using the -mrelax switch.) If this occurs, the dwarf2 01325 info will reflect this fact. We can test to see if this is the 01326 case by creating a new frame using the current stack pointer and 01327 the address of the function that we're about to call. We then 01328 unwind SP and see if it's different than the SP of our newly 01329 created frame. If the SP values are the same, the caller is not 01330 expected to allocate any additional stack. On the other hand, if 01331 the SP values are different, the difference determines the 01332 additional stack that must be allocated. 01333 01334 Note that we don't update the return value though because that's 01335 the value of the stack just after pushing the arguments, but prior 01336 to performing the call. This value is needed in order to 01337 construct the frame ID of the dummy call. */ 01338 { 01339 CORE_ADDR func_addr = find_function_addr (target_func, NULL); 01340 CORE_ADDR unwound_sp 01341 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); 01342 if (sp != unwound_sp) 01343 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, 01344 sp - (unwound_sp - sp)); 01345 } 01346 01347 return sp; 01348 } 01349 01350 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then 01351 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB 01352 register number. Why don't Dwarf2 and GDB use the same numbering? 01353 Who knows? But since people have object files lying around with 01354 the existing Dwarf2 numbering, and other people have written stubs 01355 to work with the existing GDB, neither of them can change. So we 01356 just have to cope. */ 01357 static int 01358 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) 01359 { 01360 /* This table is supposed to be shaped like the gdbarch_register_name 01361 initializer in gcc/config/mn10300/mn10300.h. Registers which 01362 appear in GCC's numbering, but have no counterpart in GDB's 01363 world, are marked with a -1. */ 01364 static int dwarf2_to_gdb[] = { 01365 0, 1, 2, 3, 4, 5, 6, 7, -1, 8, 01366 15, 16, 17, 18, 19, 20, 21, 22, 01367 32, 33, 34, 35, 36, 37, 38, 39, 01368 40, 41, 42, 43, 44, 45, 46, 47, 01369 48, 49, 50, 51, 52, 53, 54, 55, 01370 56, 57, 58, 59, 60, 61, 62, 63, 01371 9, 11 01372 }; 01373 01374 if (dwarf2 < 0 01375 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) 01376 { 01377 warning (_("Bogus register number in debug info: %d"), dwarf2); 01378 return -1; 01379 } 01380 01381 return dwarf2_to_gdb[dwarf2]; 01382 } 01383 01384 static struct gdbarch * 01385 mn10300_gdbarch_init (struct gdbarch_info info, 01386 struct gdbarch_list *arches) 01387 { 01388 struct gdbarch *gdbarch; 01389 struct gdbarch_tdep *tdep; 01390 int num_regs; 01391 01392 arches = gdbarch_list_lookup_by_info (arches, &info); 01393 if (arches != NULL) 01394 return arches->gdbarch; 01395 01396 tdep = xmalloc (sizeof (struct gdbarch_tdep)); 01397 gdbarch = gdbarch_alloc (&info, tdep); 01398 01399 switch (info.bfd_arch_info->mach) 01400 { 01401 case 0: 01402 case bfd_mach_mn10300: 01403 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); 01404 tdep->am33_mode = 0; 01405 num_regs = 32; 01406 break; 01407 case bfd_mach_am33: 01408 set_gdbarch_register_name (gdbarch, am33_register_name); 01409 tdep->am33_mode = 1; 01410 num_regs = 32; 01411 break; 01412 case bfd_mach_am33_2: 01413 set_gdbarch_register_name (gdbarch, am33_2_register_name); 01414 tdep->am33_mode = 2; 01415 num_regs = 64; 01416 set_gdbarch_fp0_regnum (gdbarch, 32); 01417 break; 01418 default: 01419 internal_error (__FILE__, __LINE__, 01420 _("mn10300_gdbarch_init: Unknown mn10300 variant")); 01421 break; 01422 } 01423 01424 /* By default, chars are unsigned. */ 01425 set_gdbarch_char_signed (gdbarch, 0); 01426 01427 /* Registers. */ 01428 set_gdbarch_num_regs (gdbarch, num_regs); 01429 set_gdbarch_register_type (gdbarch, mn10300_register_type); 01430 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); 01431 set_gdbarch_read_pc (gdbarch, mn10300_read_pc); 01432 set_gdbarch_write_pc (gdbarch, mn10300_write_pc); 01433 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); 01434 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); 01435 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); 01436 01437 /* Stack unwinding. */ 01438 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 01439 /* Breakpoints. */ 01440 set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); 01441 /* decr_pc_after_break? */ 01442 /* Disassembly. */ 01443 set_gdbarch_print_insn (gdbarch, print_insn_mn10300); 01444 01445 /* Stage 2 */ 01446 set_gdbarch_return_value (gdbarch, mn10300_return_value); 01447 01448 /* Stage 3 -- get target calls working. */ 01449 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); 01450 /* set_gdbarch_return_value (store, extract) */ 01451 01452 01453 mn10300_frame_unwind_init (gdbarch); 01454 01455 /* Hook in ABI-specific overrides, if they have been registered. */ 01456 gdbarch_init_osabi (info, gdbarch); 01457 01458 return gdbarch; 01459 } 01460 01461 /* Dump out the mn10300 specific architecture information. */ 01462 01463 static void 01464 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) 01465 { 01466 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 01467 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", 01468 tdep->am33_mode); 01469 } 01470 01471 /* Provide a prototype to silence -Wmissing-prototypes. */ 01472 extern initialize_file_ftype _initialize_mn10300_tdep; 01473 01474 void 01475 _initialize_mn10300_tdep (void) 01476 { 01477 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); 01478 } 01479