GDB (API)
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00001 /* Target-machine dependent code for Renesas H8/300, for GDB. 00002 00003 Copyright (C) 1988-2013 Free Software Foundation, Inc. 00004 00005 This file is part of GDB. 00006 00007 This program is free software; you can redistribute it and/or modify 00008 it under the terms of the GNU General Public License as published by 00009 the Free Software Foundation; either version 3 of the License, or 00010 (at your option) any later version. 00011 00012 This program is distributed in the hope that it will be useful, 00013 but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00015 GNU General Public License for more details. 00016 00017 You should have received a copy of the GNU General Public License 00018 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 00019 00020 /* 00021 Contributed by Steve Chamberlain 00022 sac@cygnus.com 00023 */ 00024 00025 #include "defs.h" 00026 #include "value.h" 00027 #include "arch-utils.h" 00028 #include "regcache.h" 00029 #include "gdbcore.h" 00030 #include "objfiles.h" 00031 #include "gdb_assert.h" 00032 #include "dis-asm.h" 00033 #include "dwarf2-frame.h" 00034 #include "frame-base.h" 00035 #include "frame-unwind.h" 00036 00037 enum gdb_regnum 00038 { 00039 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM, 00040 E_RET0_REGNUM = E_R0_REGNUM, 00041 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM, 00042 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM, 00043 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM, 00044 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM, 00045 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM, 00046 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM, 00047 E_SP_REGNUM, 00048 E_CCR_REGNUM, 00049 E_PC_REGNUM, 00050 E_CYCLES_REGNUM, 00051 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM, 00052 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM, 00053 E_INSTS_REGNUM, 00054 E_MACH_REGNUM, 00055 E_MACL_REGNUM, 00056 E_SBR_REGNUM, 00057 E_VBR_REGNUM 00058 }; 00059 00060 #define H8300_MAX_NUM_REGS 18 00061 00062 #define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)) 00063 #define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1) 00064 00065 struct h8300_frame_cache 00066 { 00067 /* Base address. */ 00068 CORE_ADDR base; 00069 CORE_ADDR sp_offset; 00070 CORE_ADDR pc; 00071 00072 /* Flag showing that a frame has been created in the prologue code. */ 00073 int uses_fp; 00074 00075 /* Saved registers. */ 00076 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS]; 00077 CORE_ADDR saved_sp; 00078 }; 00079 00080 enum 00081 { 00082 h8300_reg_size = 2, 00083 h8300h_reg_size = 4, 00084 h8300_max_reg_size = 4, 00085 }; 00086 00087 static int is_h8300hmode (struct gdbarch *gdbarch); 00088 static int is_h8300smode (struct gdbarch *gdbarch); 00089 static int is_h8300sxmode (struct gdbarch *gdbarch); 00090 static int is_h8300_normal_mode (struct gdbarch *gdbarch); 00091 00092 #define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \ 00093 && !is_h8300_normal_mode (gdbarch)) \ 00094 ? h8300h_reg_size : h8300_reg_size) 00095 00096 static CORE_ADDR 00097 h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 00098 { 00099 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); 00100 } 00101 00102 static CORE_ADDR 00103 h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 00104 { 00105 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); 00106 } 00107 00108 static struct frame_id 00109 h8300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) 00110 { 00111 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); 00112 return frame_id_build (sp, get_frame_pc (this_frame)); 00113 } 00114 00115 /* Normal frames. */ 00116 00117 /* Allocate and initialize a frame cache. */ 00118 00119 static void 00120 h8300_init_frame_cache (struct gdbarch *gdbarch, 00121 struct h8300_frame_cache *cache) 00122 { 00123 int i; 00124 00125 /* Base address. */ 00126 cache->base = 0; 00127 cache->sp_offset = 0; 00128 cache->pc = 0; 00129 00130 /* Frameless until proven otherwise. */ 00131 cache->uses_fp = 0; 00132 00133 /* Saved registers. We initialize these to -1 since zero is a valid 00134 offset (that's where %fp is supposed to be stored). */ 00135 for (i = 0; i < gdbarch_num_regs (gdbarch); i++) 00136 cache->saved_regs[i] = -1; 00137 } 00138 00139 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88) 00140 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00) 00141 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80) 00142 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0) 00143 #define IS_MOVB_EXT(x) ((x) == 0x7860) 00144 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0) 00145 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) 00146 #define IS_MOVW_EXT(x) ((x) == 0x78e0) 00147 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) 00148 /* Same instructions as mov.w, just prefixed with 0x0100. */ 00149 #define IS_MOVL_PRE(x) ((x) == 0x0100) 00150 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0) 00151 #define IS_MOVL_EXT(x) ((x) == 0x78e0) 00152 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0) 00153 00154 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76) 00155 #define IS_PUSH_FP(x) ((x) == 0x01006df6) 00156 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6) 00157 #define IS_SUB2_SP(x) ((x) == 0x1b87) 00158 #define IS_SUB4_SP(x) ((x) == 0x1b97) 00159 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f) 00160 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f) 00161 #define IS_SUBL4_SP(x) ((x) == 0x1acf) 00162 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905) 00163 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907) 00164 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907) 00165 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0) 00166 00167 /* If the instruction at PC is an argument register spill, return its 00168 length. Otherwise, return zero. 00169 00170 An argument register spill is an instruction that moves an argument 00171 from the register in which it was passed to the stack slot in which 00172 it really lives. It is a byte, word, or longword move from an 00173 argument register to a negative offset from the frame pointer. 00174 00175 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier 00176 is used, it could be a byte, word or long move to registers r3-r5. */ 00177 00178 static int 00179 h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc) 00180 { 00181 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00182 int w = read_memory_unsigned_integer (pc, 2, byte_order); 00183 00184 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w)) 00185 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */ 00186 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */ 00187 return 2; 00188 00189 if (IS_MOVB_Rn16_SP (w) 00190 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */ 00191 { 00192 /* ... and d:16 is negative. */ 00193 if (read_memory_integer (pc + 2, 2, byte_order) < 0) 00194 return 4; 00195 } 00196 else if (IS_MOVB_EXT (w)) 00197 { 00198 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 00199 2, byte_order))) 00200 { 00201 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); 00202 00203 /* ... and d:24 is negative. */ 00204 if (disp < 0 && disp > 0xffffff) 00205 return 8; 00206 } 00207 } 00208 else if (IS_MOVW_Rn16_SP (w) 00209 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */ 00210 { 00211 /* ... and d:16 is negative. */ 00212 if (read_memory_integer (pc + 2, 2, byte_order) < 0) 00213 return 4; 00214 } 00215 else if (IS_MOVW_EXT (w)) 00216 { 00217 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 00218 2, byte_order))) 00219 { 00220 LONGEST disp = read_memory_integer (pc + 4, 4, byte_order); 00221 00222 /* ... and d:24 is negative. */ 00223 if (disp < 0 && disp > 0xffffff) 00224 return 8; 00225 } 00226 } 00227 else if (IS_MOVL_PRE (w)) 00228 { 00229 int w2 = read_memory_integer (pc + 2, 2, byte_order); 00230 00231 if (IS_MOVL_Rn16_SP (w2) 00232 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */ 00233 { 00234 /* ... and d:16 is negative. */ 00235 if (read_memory_integer (pc + 4, 2, byte_order) < 0) 00236 return 6; 00237 } 00238 else if (IS_MOVL_EXT (w2)) 00239 { 00240 int w3 = read_memory_integer (pc + 4, 2, byte_order); 00241 00242 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2, byte_order))) 00243 { 00244 LONGEST disp = read_memory_integer (pc + 6, 4, byte_order); 00245 00246 /* ... and d:24 is negative. */ 00247 if (disp < 0 && disp > 0xffffff) 00248 return 10; 00249 } 00250 } 00251 } 00252 00253 return 0; 00254 } 00255 00256 /* Do a full analysis of the prologue at PC and update CACHE 00257 accordingly. Bail out early if CURRENT_PC is reached. Return the 00258 address where the analysis stopped. 00259 00260 We handle all cases that can be generated by gcc. 00261 00262 For allocating a stack frame: 00263 00264 mov.w r6,@-sp 00265 mov.w sp,r6 00266 mov.w #-n,rN 00267 add.w rN,sp 00268 00269 mov.w r6,@-sp 00270 mov.w sp,r6 00271 subs #2,sp 00272 (repeat) 00273 00274 mov.l er6,@-sp 00275 mov.l sp,er6 00276 add.l #-n,sp 00277 00278 mov.w r6,@-sp 00279 mov.w sp,r6 00280 subs #4,sp 00281 (repeat) 00282 00283 For saving registers: 00284 00285 mov.w rN,@-sp 00286 mov.l erN,@-sp 00287 stm.l reglist,@-sp 00288 00289 */ 00290 00291 static CORE_ADDR 00292 h8300_analyze_prologue (struct gdbarch *gdbarch, 00293 CORE_ADDR pc, CORE_ADDR current_pc, 00294 struct h8300_frame_cache *cache) 00295 { 00296 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00297 unsigned int op; 00298 int regno, i, spill_size; 00299 00300 cache->sp_offset = 0; 00301 00302 if (pc >= current_pc) 00303 return current_pc; 00304 00305 op = read_memory_unsigned_integer (pc, 4, byte_order); 00306 00307 if (IS_PUSHFP_MOVESPFP (op)) 00308 { 00309 cache->saved_regs[E_FP_REGNUM] = 0; 00310 cache->uses_fp = 1; 00311 pc += 4; 00312 } 00313 else if (IS_PUSH_FP (op)) 00314 { 00315 cache->saved_regs[E_FP_REGNUM] = 0; 00316 pc += 4; 00317 if (pc >= current_pc) 00318 return current_pc; 00319 op = read_memory_unsigned_integer (pc, 2, byte_order); 00320 if (IS_MOV_SP_FP (op)) 00321 { 00322 cache->uses_fp = 1; 00323 pc += 2; 00324 } 00325 } 00326 00327 while (pc < current_pc) 00328 { 00329 op = read_memory_unsigned_integer (pc, 2, byte_order); 00330 if (IS_SUB2_SP (op)) 00331 { 00332 cache->sp_offset += 2; 00333 pc += 2; 00334 } 00335 else if (IS_SUB4_SP (op)) 00336 { 00337 cache->sp_offset += 4; 00338 pc += 2; 00339 } 00340 else if (IS_ADD_IMM_SP (op)) 00341 { 00342 cache->sp_offset += -read_memory_integer (pc + 2, 2, byte_order); 00343 pc += 4; 00344 } 00345 else if (IS_SUB_IMM_SP (op)) 00346 { 00347 cache->sp_offset += read_memory_integer (pc + 2, 2, byte_order); 00348 pc += 4; 00349 } 00350 else if (IS_SUBL4_SP (op)) 00351 { 00352 cache->sp_offset += 4; 00353 pc += 2; 00354 } 00355 else if (IS_MOV_IMM_Rn (op)) 00356 { 00357 int offset = read_memory_integer (pc + 2, 2, byte_order); 00358 regno = op & 0x000f; 00359 op = read_memory_unsigned_integer (pc + 4, 2, byte_order); 00360 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno) 00361 { 00362 cache->sp_offset -= offset; 00363 pc += 6; 00364 } 00365 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno) 00366 { 00367 cache->sp_offset += offset; 00368 pc += 6; 00369 } 00370 else 00371 break; 00372 } 00373 else if (IS_PUSH (op)) 00374 { 00375 regno = op & 0x000f; 00376 cache->sp_offset += 2; 00377 cache->saved_regs[regno] = cache->sp_offset; 00378 pc += 2; 00379 } 00380 else if (op == 0x0100) 00381 { 00382 op = read_memory_unsigned_integer (pc + 2, 2, byte_order); 00383 if (IS_PUSH (op)) 00384 { 00385 regno = op & 0x000f; 00386 cache->sp_offset += 4; 00387 cache->saved_regs[regno] = cache->sp_offset; 00388 pc += 4; 00389 } 00390 else 00391 break; 00392 } 00393 else if ((op & 0xffcf) == 0x0100) 00394 { 00395 int op1; 00396 op1 = read_memory_unsigned_integer (pc + 2, 2, byte_order); 00397 if (IS_PUSH (op1)) 00398 { 00399 /* Since the prefix is 0x01x0, this is not a simple pushm but a 00400 stm.l reglist,@-sp */ 00401 i = ((op & 0x0030) >> 4) + 1; 00402 regno = op1 & 0x000f; 00403 for (; i > 0; regno++, --i) 00404 { 00405 cache->sp_offset += 4; 00406 cache->saved_regs[regno] = cache->sp_offset; 00407 } 00408 pc += 4; 00409 } 00410 else 00411 break; 00412 } 00413 else 00414 break; 00415 } 00416 00417 /* Check for spilling an argument register to the stack frame. 00418 This could also be an initializing store from non-prologue code, 00419 but I don't think there's any harm in skipping that. */ 00420 while ((spill_size = h8300_is_argument_spill (gdbarch, pc)) > 0 00421 && pc + spill_size <= current_pc) 00422 pc += spill_size; 00423 00424 return pc; 00425 } 00426 00427 static struct h8300_frame_cache * 00428 h8300_frame_cache (struct frame_info *this_frame, void **this_cache) 00429 { 00430 struct gdbarch *gdbarch = get_frame_arch (this_frame); 00431 struct h8300_frame_cache *cache; 00432 int i; 00433 CORE_ADDR current_pc; 00434 00435 if (*this_cache) 00436 return *this_cache; 00437 00438 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache); 00439 h8300_init_frame_cache (gdbarch, cache); 00440 *this_cache = cache; 00441 00442 /* In principle, for normal frames, %fp holds the frame pointer, 00443 which holds the base address for the current stack frame. 00444 However, for functions that don't need it, the frame pointer is 00445 optional. For these "frameless" functions the frame pointer is 00446 actually the frame pointer of the calling frame. */ 00447 00448 cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); 00449 if (cache->base == 0) 00450 return cache; 00451 00452 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); 00453 00454 cache->pc = get_frame_func (this_frame); 00455 current_pc = get_frame_pc (this_frame); 00456 if (cache->pc != 0) 00457 h8300_analyze_prologue (gdbarch, cache->pc, current_pc, cache); 00458 00459 if (!cache->uses_fp) 00460 { 00461 /* We didn't find a valid frame, which means that CACHE->base 00462 currently holds the frame pointer for our calling frame. If 00463 we're at the start of a function, or somewhere half-way its 00464 prologue, the function's frame probably hasn't been fully 00465 setup yet. Try to reconstruct the base address for the stack 00466 frame by looking at the stack pointer. For truly "frameless" 00467 functions this might work too. */ 00468 00469 cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM) 00470 + cache->sp_offset; 00471 cache->saved_sp = cache->base + BINWORD (gdbarch); 00472 cache->saved_regs[E_PC_REGNUM] = 0; 00473 } 00474 else 00475 { 00476 cache->saved_sp = cache->base + 2 * BINWORD (gdbarch); 00477 cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch); 00478 } 00479 00480 /* Adjust all the saved registers such that they contain addresses 00481 instead of offsets. */ 00482 for (i = 0; i < gdbarch_num_regs (gdbarch); i++) 00483 if (cache->saved_regs[i] != -1) 00484 cache->saved_regs[i] = cache->base - cache->saved_regs[i]; 00485 00486 return cache; 00487 } 00488 00489 static void 00490 h8300_frame_this_id (struct frame_info *this_frame, void **this_cache, 00491 struct frame_id *this_id) 00492 { 00493 struct h8300_frame_cache *cache = 00494 h8300_frame_cache (this_frame, this_cache); 00495 00496 /* This marks the outermost frame. */ 00497 if (cache->base == 0) 00498 return; 00499 00500 *this_id = frame_id_build (cache->saved_sp, cache->pc); 00501 } 00502 00503 static struct value * 00504 h8300_frame_prev_register (struct frame_info *this_frame, void **this_cache, 00505 int regnum) 00506 { 00507 struct gdbarch *gdbarch = get_frame_arch (this_frame); 00508 struct h8300_frame_cache *cache = 00509 h8300_frame_cache (this_frame, this_cache); 00510 00511 gdb_assert (regnum >= 0); 00512 00513 if (regnum == E_SP_REGNUM && cache->saved_sp) 00514 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); 00515 00516 if (regnum < gdbarch_num_regs (gdbarch) 00517 && cache->saved_regs[regnum] != -1) 00518 return frame_unwind_got_memory (this_frame, regnum, 00519 cache->saved_regs[regnum]); 00520 00521 return frame_unwind_got_register (this_frame, regnum, regnum); 00522 } 00523 00524 static const struct frame_unwind h8300_frame_unwind = { 00525 NORMAL_FRAME, 00526 default_frame_unwind_stop_reason, 00527 h8300_frame_this_id, 00528 h8300_frame_prev_register, 00529 NULL, 00530 default_frame_sniffer 00531 }; 00532 00533 static CORE_ADDR 00534 h8300_frame_base_address (struct frame_info *this_frame, void **this_cache) 00535 { 00536 struct h8300_frame_cache *cache = h8300_frame_cache (this_frame, this_cache); 00537 return cache->base; 00538 } 00539 00540 static const struct frame_base h8300_frame_base = { 00541 &h8300_frame_unwind, 00542 h8300_frame_base_address, 00543 h8300_frame_base_address, 00544 h8300_frame_base_address 00545 }; 00546 00547 static CORE_ADDR 00548 h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 00549 { 00550 CORE_ADDR func_addr = 0 , func_end = 0; 00551 00552 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 00553 { 00554 struct symtab_and_line sal; 00555 struct h8300_frame_cache cache; 00556 00557 /* Found a function. */ 00558 sal = find_pc_line (func_addr, 0); 00559 if (sal.end && sal.end < func_end) 00560 /* Found a line number, use it as end of prologue. */ 00561 return sal.end; 00562 00563 /* No useable line symbol. Use prologue parsing method. */ 00564 h8300_init_frame_cache (gdbarch, &cache); 00565 return h8300_analyze_prologue (gdbarch, func_addr, func_end, &cache); 00566 } 00567 00568 /* No function symbol -- just return the PC. */ 00569 return (CORE_ADDR) pc; 00570 } 00571 00572 /* Function: push_dummy_call 00573 Setup the function arguments for calling a function in the inferior. 00574 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits 00575 on the H8/300H. 00576 00577 There are actually two ABI's here: -mquickcall (the default) and 00578 -mno-quickcall. With -mno-quickcall, all arguments are passed on 00579 the stack after the return address, word-aligned. With 00580 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since 00581 GCC doesn't indicate in the object file which ABI was used to 00582 compile it, GDB only supports the default --- -mquickcall. 00583 00584 Here are the rules for -mquickcall, in detail: 00585 00586 Each argument, whether scalar or aggregate, is padded to occupy a 00587 whole number of words. Arguments smaller than a word are padded at 00588 the most significant end; those larger than a word are padded at 00589 the least significant end. 00590 00591 The initial arguments are passed in r0 -- r2. Earlier arguments go in 00592 lower-numbered registers. Multi-word arguments are passed in 00593 consecutive registers, with the most significant end in the 00594 lower-numbered register. 00595 00596 If an argument doesn't fit entirely in the remaining registers, it 00597 is passed entirely on the stack. Stack arguments begin just after 00598 the return address. Once an argument has overflowed onto the stack 00599 this way, all subsequent arguments are passed on the stack. 00600 00601 The above rule has odd consequences. For example, on the h8/300s, 00602 if a function takes two longs and an int as arguments: 00603 - the first long will be passed in r0/r1, 00604 - the second long will be passed entirely on the stack, since it 00605 doesn't fit in r2, 00606 - and the int will be passed on the stack, even though it could fit 00607 in r2. 00608 00609 A weird exception: if an argument is larger than a word, but not a 00610 whole number of words in length (before padding), it is passed on 00611 the stack following the rules for stack arguments above, even if 00612 there are sufficient registers available to hold it. Stranger 00613 still, the argument registers are still `used up' --- even though 00614 there's nothing in them. 00615 00616 So, for example, on the h8/300s, if a function expects a three-byte 00617 structure and an int, the structure will go on the stack, and the 00618 int will go in r2, not r0. 00619 00620 If the function returns an aggregate type (struct, union, or class) 00621 by value, the caller must allocate space to hold the return value, 00622 and pass the callee a pointer to this space as an invisible first 00623 argument, in R0. 00624 00625 For varargs functions, the last fixed argument and all the variable 00626 arguments are always passed on the stack. This means that calls to 00627 varargs functions don't work properly unless there is a prototype 00628 in scope. 00629 00630 Basically, this ABI is not good, for the following reasons: 00631 - You can't call vararg functions properly unless a prototype is in scope. 00632 - Structure passing is inconsistent, to no purpose I can see. 00633 - It often wastes argument registers, of which there are only three 00634 to begin with. */ 00635 00636 static CORE_ADDR 00637 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 00638 struct regcache *regcache, CORE_ADDR bp_addr, 00639 int nargs, struct value **args, CORE_ADDR sp, 00640 int struct_return, CORE_ADDR struct_addr) 00641 { 00642 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00643 int stack_alloc = 0, stack_offset = 0; 00644 int wordsize = BINWORD (gdbarch); 00645 int reg = E_ARG0_REGNUM; 00646 int argument; 00647 00648 /* First, make sure the stack is properly aligned. */ 00649 sp = align_down (sp, wordsize); 00650 00651 /* Now make sure there's space on the stack for the arguments. We 00652 may over-allocate a little here, but that won't hurt anything. */ 00653 for (argument = 0; argument < nargs; argument++) 00654 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])), 00655 wordsize); 00656 sp -= stack_alloc; 00657 00658 /* Now load as many arguments as possible into registers, and push 00659 the rest onto the stack. 00660 If we're returning a structure by value, then we must pass a 00661 pointer to the buffer for the return value as an invisible first 00662 argument. */ 00663 if (struct_return) 00664 regcache_cooked_write_unsigned (regcache, reg++, struct_addr); 00665 00666 for (argument = 0; argument < nargs; argument++) 00667 { 00668 struct cleanup *back_to; 00669 struct type *type = value_type (args[argument]); 00670 int len = TYPE_LENGTH (type); 00671 char *contents = (char *) value_contents (args[argument]); 00672 00673 /* Pad the argument appropriately. */ 00674 int padded_len = align_up (len, wordsize); 00675 gdb_byte *padded = xmalloc (padded_len); 00676 back_to = make_cleanup (xfree, padded); 00677 00678 memset (padded, 0, padded_len); 00679 memcpy (len < wordsize ? padded + padded_len - len : padded, 00680 contents, len); 00681 00682 /* Could the argument fit in the remaining registers? */ 00683 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize) 00684 { 00685 /* Are we going to pass it on the stack anyway, for no good 00686 reason? */ 00687 if (len > wordsize && len % wordsize) 00688 { 00689 /* I feel so unclean. */ 00690 write_memory (sp + stack_offset, padded, padded_len); 00691 stack_offset += padded_len; 00692 00693 /* That's right --- even though we passed the argument 00694 on the stack, we consume the registers anyway! Love 00695 me, love my dog. */ 00696 reg += padded_len / wordsize; 00697 } 00698 else 00699 { 00700 /* Heavens to Betsy --- it's really going in registers! 00701 Note that on the h8/300s, there are gaps between the 00702 registers in the register file. */ 00703 int offset; 00704 00705 for (offset = 0; offset < padded_len; offset += wordsize) 00706 { 00707 ULONGEST word 00708 = extract_unsigned_integer (padded + offset, 00709 wordsize, byte_order); 00710 regcache_cooked_write_unsigned (regcache, reg++, word); 00711 } 00712 } 00713 } 00714 else 00715 { 00716 /* It doesn't fit in registers! Onto the stack it goes. */ 00717 write_memory (sp + stack_offset, padded, padded_len); 00718 stack_offset += padded_len; 00719 00720 /* Once one argument has spilled onto the stack, all 00721 subsequent arguments go on the stack. */ 00722 reg = E_ARGLAST_REGNUM + 1; 00723 } 00724 00725 do_cleanups (back_to); 00726 } 00727 00728 /* Store return address. */ 00729 sp -= wordsize; 00730 write_memory_unsigned_integer (sp, wordsize, byte_order, bp_addr); 00731 00732 /* Update stack pointer. */ 00733 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); 00734 00735 /* Return the new stack pointer minus the return address slot since 00736 that's what DWARF2/GCC uses as the frame's CFA. */ 00737 return sp + wordsize; 00738 } 00739 00740 /* Function: extract_return_value 00741 Figure out where in REGBUF the called function has left its return value. 00742 Copy that into VALBUF. Be sure to account for CPU type. */ 00743 00744 static void 00745 h8300_extract_return_value (struct type *type, struct regcache *regcache, 00746 void *valbuf) 00747 { 00748 struct gdbarch *gdbarch = get_regcache_arch (regcache); 00749 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00750 int len = TYPE_LENGTH (type); 00751 ULONGEST c, addr; 00752 00753 switch (len) 00754 { 00755 case 1: 00756 case 2: 00757 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 00758 store_unsigned_integer (valbuf, len, byte_order, c); 00759 break; 00760 case 4: /* Needs two registers on plain H8/300 */ 00761 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 00762 store_unsigned_integer (valbuf, 2, byte_order, c); 00763 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); 00764 store_unsigned_integer ((void *)((char *) valbuf + 2), 2, byte_order, c); 00765 break; 00766 case 8: /* long long is now 8 bytes. */ 00767 if (TYPE_CODE (type) == TYPE_CODE_INT) 00768 { 00769 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr); 00770 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len, byte_order); 00771 store_unsigned_integer (valbuf, len, byte_order, c); 00772 } 00773 else 00774 { 00775 error (_("I don't know how this 8 byte value is returned.")); 00776 } 00777 break; 00778 } 00779 } 00780 00781 static void 00782 h8300h_extract_return_value (struct type *type, struct regcache *regcache, 00783 void *valbuf) 00784 { 00785 struct gdbarch *gdbarch = get_regcache_arch (regcache); 00786 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00787 ULONGEST c; 00788 00789 switch (TYPE_LENGTH (type)) 00790 { 00791 case 1: 00792 case 2: 00793 case 4: 00794 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 00795 store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, c); 00796 break; 00797 case 8: /* long long is now 8 bytes. */ 00798 if (TYPE_CODE (type) == TYPE_CODE_INT) 00799 { 00800 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c); 00801 store_unsigned_integer (valbuf, 4, byte_order, c); 00802 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c); 00803 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, 00804 byte_order, c); 00805 } 00806 else 00807 { 00808 error (_("I don't know how this 8 byte value is returned.")); 00809 } 00810 break; 00811 } 00812 } 00813 00814 static int 00815 h8300_use_struct_convention (struct type *value_type) 00816 { 00817 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the 00818 stack. */ 00819 00820 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT 00821 || TYPE_CODE (value_type) == TYPE_CODE_UNION) 00822 return 1; 00823 return !(TYPE_LENGTH (value_type) == 1 00824 || TYPE_LENGTH (value_type) == 2 00825 || TYPE_LENGTH (value_type) == 4); 00826 } 00827 00828 static int 00829 h8300h_use_struct_convention (struct type *value_type) 00830 { 00831 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are 00832 returned in R0/R1, everything else on the stack. */ 00833 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT 00834 || TYPE_CODE (value_type) == TYPE_CODE_UNION) 00835 return 1; 00836 return !(TYPE_LENGTH (value_type) == 1 00837 || TYPE_LENGTH (value_type) == 2 00838 || TYPE_LENGTH (value_type) == 4 00839 || (TYPE_LENGTH (value_type) == 8 00840 && TYPE_CODE (value_type) == TYPE_CODE_INT)); 00841 } 00842 00843 /* Function: store_return_value 00844 Place the appropriate value in the appropriate registers. 00845 Primarily used by the RETURN command. */ 00846 00847 static void 00848 h8300_store_return_value (struct type *type, struct regcache *regcache, 00849 const void *valbuf) 00850 { 00851 struct gdbarch *gdbarch = get_regcache_arch (regcache); 00852 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00853 ULONGEST val; 00854 00855 switch (TYPE_LENGTH (type)) 00856 { 00857 case 1: 00858 case 2: /* short... */ 00859 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 00860 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); 00861 break; 00862 case 4: /* long, float */ 00863 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 00864 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, 00865 (val >> 16) & 0xffff); 00866 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff); 00867 break; 00868 case 8: /* long long, double and long double 00869 are all defined as 4 byte types so 00870 far so this shouldn't happen. */ 00871 error (_("I don't know how to return an 8 byte value.")); 00872 break; 00873 } 00874 } 00875 00876 static void 00877 h8300h_store_return_value (struct type *type, struct regcache *regcache, 00878 const void *valbuf) 00879 { 00880 struct gdbarch *gdbarch = get_regcache_arch (regcache); 00881 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 00882 ULONGEST val; 00883 00884 switch (TYPE_LENGTH (type)) 00885 { 00886 case 1: 00887 case 2: 00888 case 4: /* long, float */ 00889 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 00890 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val); 00891 break; 00892 case 8: 00893 val = extract_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order); 00894 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, 00895 (val >> 32) & 0xffffffff); 00896 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, 00897 val & 0xffffffff); 00898 break; 00899 } 00900 } 00901 00902 static enum return_value_convention 00903 h8300_return_value (struct gdbarch *gdbarch, struct value *function, 00904 struct type *type, struct regcache *regcache, 00905 gdb_byte *readbuf, const gdb_byte *writebuf) 00906 { 00907 if (h8300_use_struct_convention (type)) 00908 return RETURN_VALUE_STRUCT_CONVENTION; 00909 if (writebuf) 00910 h8300_store_return_value (type, regcache, writebuf); 00911 else if (readbuf) 00912 h8300_extract_return_value (type, regcache, readbuf); 00913 return RETURN_VALUE_REGISTER_CONVENTION; 00914 } 00915 00916 static enum return_value_convention 00917 h8300h_return_value (struct gdbarch *gdbarch, struct value *function, 00918 struct type *type, struct regcache *regcache, 00919 gdb_byte *readbuf, const gdb_byte *writebuf) 00920 { 00921 if (h8300h_use_struct_convention (type)) 00922 { 00923 if (readbuf) 00924 { 00925 ULONGEST addr; 00926 00927 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr); 00928 read_memory (addr, readbuf, TYPE_LENGTH (type)); 00929 } 00930 00931 return RETURN_VALUE_ABI_RETURNS_ADDRESS; 00932 } 00933 if (writebuf) 00934 h8300h_store_return_value (type, regcache, writebuf); 00935 else if (readbuf) 00936 h8300h_extract_return_value (type, regcache, readbuf); 00937 return RETURN_VALUE_REGISTER_CONVENTION; 00938 } 00939 00940 static struct cmd_list_element *setmachinelist; 00941 00942 static const char * 00943 h8300_register_name (struct gdbarch *gdbarch, int regno) 00944 { 00945 /* The register names change depending on which h8300 processor 00946 type is selected. */ 00947 static char *register_names[] = { 00948 "r0", "r1", "r2", "r3", "r4", "r5", "r6", 00949 "sp", "", "pc", "cycles", "tick", "inst", 00950 "ccr", /* pseudo register */ 00951 }; 00952 if (regno < 0 00953 || regno >= (sizeof (register_names) / sizeof (*register_names))) 00954 internal_error (__FILE__, __LINE__, 00955 _("h8300_register_name: illegal register number %d"), 00956 regno); 00957 else 00958 return register_names[regno]; 00959 } 00960 00961 static const char * 00962 h8300s_register_name (struct gdbarch *gdbarch, int regno) 00963 { 00964 static char *register_names[] = { 00965 "er0", "er1", "er2", "er3", "er4", "er5", "er6", 00966 "sp", "", "pc", "cycles", "", "tick", "inst", 00967 "mach", "macl", 00968 "ccr", "exr" /* pseudo registers */ 00969 }; 00970 if (regno < 0 00971 || regno >= (sizeof (register_names) / sizeof (*register_names))) 00972 internal_error (__FILE__, __LINE__, 00973 _("h8300s_register_name: illegal register number %d"), 00974 regno); 00975 else 00976 return register_names[regno]; 00977 } 00978 00979 static const char * 00980 h8300sx_register_name (struct gdbarch *gdbarch, int regno) 00981 { 00982 static char *register_names[] = { 00983 "er0", "er1", "er2", "er3", "er4", "er5", "er6", 00984 "sp", "", "pc", "cycles", "", "tick", "inst", 00985 "mach", "macl", "sbr", "vbr", 00986 "ccr", "exr" /* pseudo registers */ 00987 }; 00988 if (regno < 0 00989 || regno >= (sizeof (register_names) / sizeof (*register_names))) 00990 internal_error (__FILE__, __LINE__, 00991 _("h8300sx_register_name: illegal register number %d"), 00992 regno); 00993 else 00994 return register_names[regno]; 00995 } 00996 00997 static void 00998 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file, 00999 struct frame_info *frame, int regno) 01000 { 01001 LONGEST rval; 01002 const char *name = gdbarch_register_name (gdbarch, regno); 01003 01004 if (!name || !*name) 01005 return; 01006 01007 rval = get_frame_register_signed (frame, regno); 01008 01009 fprintf_filtered (file, "%-14s ", name); 01010 if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \ 01011 (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))) 01012 { 01013 fprintf_filtered (file, "0x%02x ", (unsigned char) rval); 01014 print_longest (file, 'u', 1, rval); 01015 } 01016 else 01017 { 01018 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, 01019 BINWORD (gdbarch))); 01020 print_longest (file, 'd', 1, rval); 01021 } 01022 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 01023 { 01024 /* CCR register */ 01025 int C, Z, N, V; 01026 unsigned char l = rval & 0xff; 01027 fprintf_filtered (file, "\t"); 01028 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0); 01029 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0); 01030 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0); 01031 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0); 01032 N = (l & 0x8) != 0; 01033 Z = (l & 0x4) != 0; 01034 V = (l & 0x2) != 0; 01035 C = (l & 0x1) != 0; 01036 fprintf_filtered (file, "N-%d ", N); 01037 fprintf_filtered (file, "Z-%d ", Z); 01038 fprintf_filtered (file, "V-%d ", V); 01039 fprintf_filtered (file, "C-%d ", C); 01040 if ((C | Z) == 0) 01041 fprintf_filtered (file, "u> "); 01042 if ((C | Z) == 1) 01043 fprintf_filtered (file, "u<= "); 01044 if ((C == 0)) 01045 fprintf_filtered (file, "u>= "); 01046 if (C == 1) 01047 fprintf_filtered (file, "u< "); 01048 if (Z == 0) 01049 fprintf_filtered (file, "!= "); 01050 if (Z == 1) 01051 fprintf_filtered (file, "== "); 01052 if ((N ^ V) == 0) 01053 fprintf_filtered (file, ">= "); 01054 if ((N ^ V) == 1) 01055 fprintf_filtered (file, "< "); 01056 if ((Z | (N ^ V)) == 0) 01057 fprintf_filtered (file, "> "); 01058 if ((Z | (N ^ V)) == 1) 01059 fprintf_filtered (file, "<= "); 01060 } 01061 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)) 01062 { 01063 /* EXR register */ 01064 unsigned char l = rval & 0xff; 01065 fprintf_filtered (file, "\t"); 01066 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0); 01067 fprintf_filtered (file, "I2-%d ", (l & 4) != 0); 01068 fprintf_filtered (file, "I1-%d ", (l & 2) != 0); 01069 fprintf_filtered (file, "I0-%d", (l & 1) != 0); 01070 } 01071 fprintf_filtered (file, "\n"); 01072 } 01073 01074 static void 01075 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, 01076 struct frame_info *frame, int regno, int cpregs) 01077 { 01078 if (regno < 0) 01079 { 01080 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno) 01081 h8300_print_register (gdbarch, file, frame, regno); 01082 h8300_print_register (gdbarch, file, frame, 01083 E_PSEUDO_CCR_REGNUM (gdbarch)); 01084 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM); 01085 if (is_h8300smode (gdbarch)) 01086 { 01087 h8300_print_register (gdbarch, file, frame, 01088 E_PSEUDO_EXR_REGNUM (gdbarch)); 01089 if (is_h8300sxmode (gdbarch)) 01090 { 01091 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM); 01092 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM); 01093 } 01094 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM); 01095 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM); 01096 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); 01097 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM); 01098 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM); 01099 } 01100 else 01101 { 01102 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM); 01103 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM); 01104 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM); 01105 } 01106 } 01107 else 01108 { 01109 if (regno == E_CCR_REGNUM) 01110 h8300_print_register (gdbarch, file, frame, 01111 E_PSEUDO_CCR_REGNUM (gdbarch)); 01112 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) 01113 && is_h8300smode (gdbarch)) 01114 h8300_print_register (gdbarch, file, frame, 01115 E_PSEUDO_EXR_REGNUM (gdbarch)); 01116 else 01117 h8300_print_register (gdbarch, file, frame, regno); 01118 } 01119 } 01120 01121 static struct type * 01122 h8300_register_type (struct gdbarch *gdbarch, int regno) 01123 { 01124 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch) 01125 + gdbarch_num_pseudo_regs (gdbarch)) 01126 internal_error (__FILE__, __LINE__, 01127 _("h8300_register_type: illegal register number %d"), 01128 regno); 01129 else 01130 { 01131 switch (regno) 01132 { 01133 case E_PC_REGNUM: 01134 return builtin_type (gdbarch)->builtin_func_ptr; 01135 case E_SP_REGNUM: 01136 case E_FP_REGNUM: 01137 return builtin_type (gdbarch)->builtin_data_ptr; 01138 default: 01139 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 01140 return builtin_type (gdbarch)->builtin_uint8; 01141 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) 01142 return builtin_type (gdbarch)->builtin_uint8; 01143 else if (is_h8300hmode (gdbarch)) 01144 return builtin_type (gdbarch)->builtin_int32; 01145 else 01146 return builtin_type (gdbarch)->builtin_int16; 01147 } 01148 } 01149 } 01150 01151 static enum register_status 01152 h8300_pseudo_register_read (struct gdbarch *gdbarch, 01153 struct regcache *regcache, int regno, 01154 gdb_byte *buf) 01155 { 01156 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 01157 return regcache_raw_read (regcache, E_CCR_REGNUM, buf); 01158 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) 01159 return regcache_raw_read (regcache, E_EXR_REGNUM, buf); 01160 else 01161 return regcache_raw_read (regcache, regno, buf); 01162 } 01163 01164 static void 01165 h8300_pseudo_register_write (struct gdbarch *gdbarch, 01166 struct regcache *regcache, int regno, 01167 const gdb_byte *buf) 01168 { 01169 if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) 01170 regcache_raw_write (regcache, E_CCR_REGNUM, buf); 01171 else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) 01172 regcache_raw_write (regcache, E_EXR_REGNUM, buf); 01173 else 01174 regcache_raw_write (regcache, regno, buf); 01175 } 01176 01177 static int 01178 h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) 01179 { 01180 if (regno == E_CCR_REGNUM) 01181 return E_PSEUDO_CCR_REGNUM (gdbarch); 01182 return regno; 01183 } 01184 01185 static int 01186 h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno) 01187 { 01188 if (regno == E_CCR_REGNUM) 01189 return E_PSEUDO_CCR_REGNUM (gdbarch); 01190 if (regno == E_EXR_REGNUM) 01191 return E_PSEUDO_EXR_REGNUM (gdbarch); 01192 return regno; 01193 } 01194 01195 static const unsigned char * 01196 h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, 01197 int *lenptr) 01198 { 01199 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */ 01200 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */ 01201 01202 *lenptr = sizeof (breakpoint); 01203 return breakpoint; 01204 } 01205 01206 static void 01207 h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, 01208 struct frame_info *frame, const char *args) 01209 { 01210 fprintf_filtered (file, "\ 01211 No floating-point info available for this processor.\n"); 01212 } 01213 01214 static struct gdbarch * 01215 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 01216 { 01217 struct gdbarch_tdep *tdep = NULL; 01218 struct gdbarch *gdbarch; 01219 01220 arches = gdbarch_list_lookup_by_info (arches, &info); 01221 if (arches != NULL) 01222 return arches->gdbarch; 01223 01224 #if 0 01225 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); 01226 #endif 01227 01228 if (info.bfd_arch_info->arch != bfd_arch_h8300) 01229 return NULL; 01230 01231 gdbarch = gdbarch_alloc (&info, 0); 01232 01233 switch (info.bfd_arch_info->mach) 01234 { 01235 case bfd_mach_h8300: 01236 set_gdbarch_num_regs (gdbarch, 13); 01237 set_gdbarch_num_pseudo_regs (gdbarch, 1); 01238 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 01239 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 01240 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 01241 set_gdbarch_register_name (gdbarch, h8300_register_name); 01242 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01243 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01244 set_gdbarch_return_value (gdbarch, h8300_return_value); 01245 set_gdbarch_print_insn (gdbarch, print_insn_h8300); 01246 break; 01247 case bfd_mach_h8300h: 01248 case bfd_mach_h8300hn: 01249 set_gdbarch_num_regs (gdbarch, 13); 01250 set_gdbarch_num_pseudo_regs (gdbarch, 1); 01251 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 01252 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 01253 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum); 01254 set_gdbarch_register_name (gdbarch, h8300_register_name); 01255 if (info.bfd_arch_info->mach != bfd_mach_h8300hn) 01256 { 01257 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01258 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01259 } 01260 else 01261 { 01262 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01263 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01264 } 01265 set_gdbarch_return_value (gdbarch, h8300h_return_value); 01266 set_gdbarch_print_insn (gdbarch, print_insn_h8300h); 01267 break; 01268 case bfd_mach_h8300s: 01269 case bfd_mach_h8300sn: 01270 set_gdbarch_num_regs (gdbarch, 16); 01271 set_gdbarch_num_pseudo_regs (gdbarch, 2); 01272 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 01273 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 01274 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 01275 set_gdbarch_register_name (gdbarch, h8300s_register_name); 01276 if (info.bfd_arch_info->mach != bfd_mach_h8300sn) 01277 { 01278 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01279 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01280 } 01281 else 01282 { 01283 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01284 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01285 } 01286 set_gdbarch_return_value (gdbarch, h8300h_return_value); 01287 set_gdbarch_print_insn (gdbarch, print_insn_h8300s); 01288 break; 01289 case bfd_mach_h8300sx: 01290 case bfd_mach_h8300sxn: 01291 set_gdbarch_num_regs (gdbarch, 18); 01292 set_gdbarch_num_pseudo_regs (gdbarch, 2); 01293 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 01294 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 01295 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum); 01296 set_gdbarch_register_name (gdbarch, h8300sx_register_name); 01297 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn) 01298 { 01299 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01300 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01301 } 01302 else 01303 { 01304 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01305 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01306 } 01307 set_gdbarch_return_value (gdbarch, h8300h_return_value); 01308 set_gdbarch_print_insn (gdbarch, print_insn_h8300s); 01309 break; 01310 } 01311 01312 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read); 01313 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write); 01314 01315 /* 01316 * Basic register fields and methods. 01317 */ 01318 01319 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); 01320 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); 01321 set_gdbarch_register_type (gdbarch, h8300_register_type); 01322 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info); 01323 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info); 01324 01325 /* 01326 * Frame Info 01327 */ 01328 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue); 01329 01330 /* Frame unwinder. */ 01331 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc); 01332 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp); 01333 set_gdbarch_dummy_id (gdbarch, h8300_dummy_id); 01334 frame_base_set_default (gdbarch, &h8300_frame_base); 01335 01336 /* 01337 * Miscelany 01338 */ 01339 /* Stack grows up. */ 01340 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 01341 01342 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc); 01343 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call); 01344 01345 set_gdbarch_char_signed (gdbarch, 0); 01346 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); 01347 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01348 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); 01349 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01350 set_gdbarch_double_format (gdbarch, floatformats_ieee_single); 01351 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); 01352 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); 01353 01354 set_gdbarch_believe_pcc_promotion (gdbarch, 1); 01355 01356 /* Hook in the DWARF CFI frame unwinder. */ 01357 dwarf2_append_unwinders (gdbarch); 01358 frame_unwind_append_unwinder (gdbarch, &h8300_frame_unwind); 01359 01360 return gdbarch; 01361 01362 } 01363 01364 extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */ 01365 01366 void 01367 _initialize_h8300_tdep (void) 01368 { 01369 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init); 01370 } 01371 01372 static int 01373 is_h8300hmode (struct gdbarch *gdbarch) 01374 { 01375 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx 01376 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn 01377 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s 01378 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn 01379 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h 01380 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; 01381 } 01382 01383 static int 01384 is_h8300smode (struct gdbarch *gdbarch) 01385 { 01386 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx 01387 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn 01388 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s 01389 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn; 01390 } 01391 01392 static int 01393 is_h8300sxmode (struct gdbarch *gdbarch) 01394 { 01395 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx 01396 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn; 01397 } 01398 01399 static int 01400 is_h8300_normal_mode (struct gdbarch *gdbarch) 01401 { 01402 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn 01403 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn 01404 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn; 01405 }