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00001 /* Target-dependent definitions for AMD64.
00002 
00003    Copyright (C) 2001-2013 Free Software Foundation, Inc.
00004    Contributed by Jiri Smid, SuSE Labs.
00005 
00006    This file is part of GDB.
00007 
00008    This program is free software; you can redistribute it and/or modify
00009    it under the terms of the GNU General Public License as published by
00010    the Free Software Foundation; either version 3 of the License, or
00011    (at your option) any later version.
00012 
00013    This program is distributed in the hope that it will be useful,
00014    but WITHOUT ANY WARRANTY; without even the implied warranty of
00015    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00016    GNU General Public License for more details.
00017 
00018    You should have received a copy of the GNU General Public License
00019    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
00020 
00021 #ifndef AMD64_TDEP_H
00022 #define AMD64_TDEP_H
00023 
00024 struct gdbarch;
00025 struct frame_info;
00026 struct regcache;
00027 
00028 #include "i386-tdep.h"
00029 
00030 /* Register numbers of various important registers.  */
00031 
00032 enum amd64_regnum
00033 {
00034   AMD64_RAX_REGNUM,             /* %rax */
00035   AMD64_RBX_REGNUM,             /* %rbx */
00036   AMD64_RCX_REGNUM,             /* %rcx */
00037   AMD64_RDX_REGNUM,             /* %rdx */
00038   AMD64_RSI_REGNUM,             /* %rsi */
00039   AMD64_RDI_REGNUM,             /* %rdi */
00040   AMD64_RBP_REGNUM,             /* %rbp */
00041   AMD64_RSP_REGNUM,             /* %rsp */
00042   AMD64_R8_REGNUM,              /* %r8 */
00043   AMD64_R9_REGNUM,              /* %r9 */
00044   AMD64_R10_REGNUM,             /* %r10 */
00045   AMD64_R11_REGNUM,             /* %r11 */
00046   AMD64_R12_REGNUM,             /* %r12 */
00047   AMD64_R13_REGNUM,             /* %r13 */
00048   AMD64_R14_REGNUM,             /* %r14 */
00049   AMD64_R15_REGNUM,             /* %r15 */
00050   AMD64_RIP_REGNUM,             /* %rip */
00051   AMD64_EFLAGS_REGNUM,          /* %eflags */
00052   AMD64_CS_REGNUM,              /* %cs */
00053   AMD64_SS_REGNUM,              /* %ss */
00054   AMD64_DS_REGNUM,              /* %ds */
00055   AMD64_ES_REGNUM,              /* %es */
00056   AMD64_FS_REGNUM,              /* %fs */
00057   AMD64_GS_REGNUM,              /* %gs */
00058   AMD64_ST0_REGNUM = 24,        /* %st0 */
00059   AMD64_ST1_REGNUM,             /* %st1 */
00060   AMD64_FCTRL_REGNUM = AMD64_ST0_REGNUM + 8,
00061   AMD64_FSTAT_REGNUM = AMD64_ST0_REGNUM + 9,
00062   AMD64_FTAG_REGNUM = AMD64_ST0_REGNUM + 10,
00063   AMD64_XMM0_REGNUM = 40,       /* %xmm0 */
00064   AMD64_XMM1_REGNUM,            /* %xmm1 */
00065   AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
00066   AMD64_YMM0H_REGNUM,           /* %ymm0h */
00067   AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15
00068 };
00069 
00070 /* Number of general purpose registers.  */
00071 #define AMD64_NUM_GREGS         24
00072 
00073 #define AMD64_NUM_REGS          (AMD64_YMM15H_REGNUM + 1)
00074 
00075 extern struct displaced_step_closure *amd64_displaced_step_copy_insn
00076   (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
00077    struct regcache *regs);
00078 extern void amd64_displaced_step_fixup (struct gdbarch *gdbarch,
00079                                         struct displaced_step_closure *closure,
00080                                         CORE_ADDR from, CORE_ADDR to,
00081                                         struct regcache *regs);
00082 
00083 extern void amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch);
00084 extern void amd64_x32_init_abi (struct gdbarch_info info,
00085                                 struct gdbarch *gdbarch);
00086 
00087 /* Fill register REGNUM in REGCACHE with the appropriate
00088    floating-point or SSE register value from *FXSAVE.  If REGNUM is
00089    -1, do this for all registers.  This function masks off any of the
00090    reserved bits in *FXSAVE.  */
00091 
00092 extern void amd64_supply_fxsave (struct regcache *regcache, int regnum,
00093                                  const void *fxsave);
00094 
00095 /* Similar to amd64_supply_fxsave, but use XSAVE extended state.  */
00096 extern void amd64_supply_xsave (struct regcache *regcache, int regnum,
00097                                 const void *xsave);
00098 
00099 /* Fill register REGNUM (if it is a floating-point or SSE register) in
00100    *FXSAVE with the value from REGCACHE.  If REGNUM is -1, do this for
00101    all registers.  This function doesn't touch any of the reserved
00102    bits in *FXSAVE.  */
00103 
00104 extern void amd64_collect_fxsave (const struct regcache *regcache, int regnum,
00105                                   void *fxsave);
00106 /* Similar to amd64_collect_fxsave, but use XSAVE extended state.  */
00107 extern void amd64_collect_xsave (const struct regcache *regcache,
00108                                  int regnum, void *xsave, int gcore);
00109 
00110 
00111 /* Variables exported from amd64-linux-tdep.c.  */
00112 extern int amd64_linux_gregset_reg_offset[];
00113 
00114 /* Variables exported from amd64nbsd-tdep.c.  */
00115 extern int amd64nbsd_r_reg_offset[];
00116 
00117 /* Variables exported from amd64obsd-tdep.c.  */
00118 extern int amd64obsd_r_reg_offset[];
00119 
00120 /* Variables exported from amd64fbsd-tdep.c.  */
00121 extern CORE_ADDR amd64fbsd_sigtramp_start_addr;
00122 extern CORE_ADDR amd64fbsd_sigtramp_end_addr;
00123 extern int amd64fbsd_sc_reg_offset[];
00124 
00125 #endif /* amd64-tdep.h */